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.TH "mlx5dv_devx_alloc_uar / mlx5dv_devx_free_uar" "3" "" "" ""
.hy
.SH NAME
.PP
mlx5dv_devx_alloc_uar \- Allocates a DEVX UAR
.PP
mlx5dv_devx_free_uar \- Frees a DEVX UAR
.SH SYNOPSIS
.IP
.nf
\f[C]
#include\ <infiniband/mlx5dv.h>

struct\ mlx5dv_devx_uar\ *mlx5dv_devx_alloc_uar(struct\ ibv_context\ *context,
\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32_t\ flags);

void\ mlx5dv_devx_free_uar(struct\ mlx5dv_devx_uar\ *devx_uar);
\f[]
.fi
.SH DESCRIPTION
.PP
Create / free a DEVX UAR which is needed for other device commands over
the DEVX interface.
.PP
The DEVX API enables direct access from the user space area to the mlx5
device driver, the UAR information is needed for few commands as of QP
creation.
.SH ARGUMENTS
.TP
.B \f[I]context\f[]
RDMA device context to work on.
.RS
.RE
.TP
.B \f[I]flags\f[]
Allocation flags for the UAR.
MLX5DV_UAR_ALLOC_TYPE_BF: Allocate UAR with Blueflame properties.
MLX5DV_UAR_ALLOC_TYPE_NC: Allocate UAR with non\-cache properties.
.RS
.RE
.SS devx_uar
.IP
.nf
\f[C]
struct\ mlx5dv_devx_uar\ {
\ \ \ \ void\ *reg_addr;
\ \ \ \ void\ *base_addr;
\ \ \ \ uint32_t\ page_id;
\ \ \ \ off_t\ mmap_off;
\ \ \ \ uint64_t\ comp_mask;
};
\f[]
.fi
.TP
.B \f[I]reg_addr\f[]
The write address of DB/BF.
.RS
.RE
.TP
.B \f[I]base_addr\f[]
The base address of the UAR.
.RS
.RE
.TP
.B \f[I]page_id\f[]
The device page id to be used.
.RS
.RE
.TP
.B \f[I]mmap_off\f[]
The mmap offset parameter to be used for re\-mapping, to be used by a
secondary process.
.RS
.RE
.SH RETURN VALUE
.PP
Upon success \f[I]mlx5dv_devx_alloc_uar\f[] will return a new
\f[I]struct mlx5dv_devx_uar\f[], on error NULL will be returned and
errno will be set.
.SH SEE ALSO
.PP
\f[B]mlx5dv_open_device\f[], \f[B]mlx5dv_devx_obj_create\f[]
.SH AUTHOR
.PP
Yishai Hadas <yishaih@mellanox.com>