{ ****************************
{ THIS IS OPEN SOURCE CODE
{ ****************************
{ (C) COPYRIGHT International Business Machines Corp. 2005
{ This file is licensed under the University of Tennessee license.
{ See LICENSE.txt.
{
{ File: events/power5/groups
{ Author: Maynard Johnson
{ maynardj@us.ibm.com
{ Mods:
{
{ Number of groups
145
{ Group descriptions
#0,190,71,56,12,0,0,pm_utilization,CPI and utilization data
##00005,00001,00009,0000F,00009,00005
00000000,00000000,0A02121E,00000000
CPI and utilization data
#1,2,195,49,12,0,0,pm_completion,Completion and cycle counts
##00013,00004,00013,0000F,00009,00005
00000000,00000000,2608261E,00000000
Completion and cycle counts
#2,66,65,50,60,0,0,pm_group_dispatch,Group dispatch events
##120E3,120E4,130E1,00009,00009,00005
00000000,4000000E,C6C8C212,00000000
Group dispatch events
#3,0,2,169,138,0,0,pm_clb1,CLB fullness
##400C0,400C2,410C6,C70A6,00009,00005
00000000,015B0001,80848C4C,00000001
CLB fullness
#4,6,6,149,59,0,0,pm_clb2,CLB fullness
##400C5,400C6,C70E6,00001,00009,00005
00000000,01430002,8A8CCC02,00000001
CLB fullness
#5,60,59,46,51,0,0,pm_gct_empty,GCT empty reasons
##00004,1009C,10084,1009C,00009,00005
00000000,40000000,08380838,00000000
GCT empty reasons
#6,62,61,47,52,0,0,pm_gct_usage,GCT Usage
##0001F,0001F,0001F,0001F,00009,00005
00000000,00000000,3E3E3E3E,00000000
GCT Usage
#7,143,143,113,119,0,0,pm_lsu1,LSU LRQ and LMQ events
##C20E6,C20E2,C30E6,C30E5,00009,00005
00000000,000F000F,CCC4CCCA,00000000
LSU LRQ and LMQ events
#8,147,147,119,123,0,0,pm_lsu2,LSU SRQ events
##C20E5,C20E1,830E5,110C3,00009,00005
00000000,400E000E,CAC2CA86,00000000
LSU SRQ events
#9,149,141,112,122,0,0,pm_lsu3,LSU SRQ and LMQ events
##C2088,00015,C70E5,00015,00009,00005
00000000,010F000A,102ACA2A,00000000
LSU SRQ and LMQ events
#10,212,73,117,18,0,0,pm_prefetch1,Prefetch stream allocation
##2209B,220E4,C50C2,830E7,00009,00005
00000000,8432000D,36C884CE,00000000
Prefetch stream allocation
#11,73,9,61,58,0,0,pm_prefetch2,Prefetch events
##00001,220E5,C70E7,210C7,00009,00005
00000000,81030006,02CACE8E,00000001
Prefetch events
#12,139,1,87,59,0,0,pm_prefetch3,L2 prefetch and misc events
##C2090,400C1,C50C3,00001,00009,00005
00000000,047C0008,20828602,00000001
L2 prefetch and misc events
#13,126,135,13,91,0,0,pm_prefetch4,Misc prefetch and reject events
##C60E0,C60E4,830E6,C50C3,00009,00005
00000000,063E000E,C0C8CC86,00000000
Misc prefetch and reject events
#14,145,144,25,159,0,0,pm_lsu_reject1,LSU reject events
##C6090,C6088,330E3,81088,00009,00005
00000000,C22C000E,2010C610,00000001
LSU reject events
#15,125,134,55,66,0,0,pm_lsu_reject2,LSU rejects due to reload CDF or tag update collision
##C60E2,C60E6,00001,230E7,00009,00005
00000000,820C000D,C4CC02CE,00000001
LSU rejects due to reload CDF or tag update collision
#16,123,132,120,191,0,0,pm_lsu_reject3,LSU rejects due to ERAT, held instuctions
##C60E3,C60E7,130E0,130E4,00009,00005
00000000,420C000F,C6CEC0C8,00000000
LSU rejects due to ERAT, held instuctions
#17,124,133,55,1,0,0,pm_lsu_reject4,LSU0/1 reject LMQ full
##C60E1,C60E5,00001,230E4,00009,00005
00000000,820C000D,C2CA02C8,00000001
LSU0/1 reject LMQ full
#18,146,145,109,31,0,0,pm_lsu_reject5,LSU misc reject and flush events
##C6088,C6090,110C5,110C7,00009,00005
00000000,420C000C,10208A8E,00000000
LSU misc reject and flush events
#19,73,140,25,16,0,0,pm_flush1,Misc flush events
##00001,C0088,330E3,C10C7,00009,00005
00000000,C0F00002,0210C68E,00000001
Misc flush events
#20,81,71,27,33,0,0,pm_flush2,Flushes due to scoreboard and sync
##800C0,00001,330E2,330E1,00009,00005
00000000,C0800003,8002C4C2,00000001
Flushes due to scoreboard and sync
#21,141,138,55,113,0,0,pm_lsu_flush_srq_lrq,LSU flush by SRQ and LRQ events
##C0090,C0090,00001,110C5,00009,00005
00000000,40C00000,2020028A,00000001
LSU flush by SRQ and LRQ events
#22,119,128,109,59,0,0,pm_lsu_flush_lrq,LSU0/1 flush due to LRQ
##C00C2,C00C6,110C5,00001,00009,00005
00000000,40C00000,848C8A02,00000001
LSU0/1 flush due to LRQ
#23,120,129,55,113,0,0,pm_lsu_flush_srq,LSU0/1 flush due to SRQ
##C00C3,C00C7,00001,110C5,00009,00005
00000000,40C00000,868E028A,00000001
LSU0/1 flush due to SRQ
#24,142,140,0,59,0,0,pm_lsu_flush_unaligned,LSU flush due to unaligned data
##C0088,C0088,230E4,00001,00009,00005
00000000,80C00002,1010C802,00000001
LSU flush due to unaligned data
#25,121,130,109,59,0,0,pm_lsu_flush_uld,LSU0/1 flush due to unaligned load
##C00C0,C00C4,110C5,00001,00009,00005
00000000,40C00000,80888A02,00000001
LSU0/1 flush due to unaligned load
#26,122,131,55,113,0,0,pm_lsu_flush_ust,LSU0/1 flush due to unaligned store
##C00C1,C00C5,00001,110C5,00009,00005
00000000,40C00000,828A028A,00000001
LSU0/1 flush due to unaligned store
#27,140,71,147,114,0,0,pm_lsu_flush_full,LSU flush due to LRQ/SRQ full
##320E7,00001,81088,330E0,00009,00005
00000000,C0200009,CE0210C0,00000001
LSU flush due to LRQ/SRQ full
#28,70,13,55,10,0,0,pm_lsu_stall1,LSU Stalls
##00014,11098,00001,1109A,00009,00005
00000000,40000000,28300234,00000001
LSU Stalls
#29,73,10,6,8,0,0,pm_lsu_stall2,LSU Stalls
##00001,1109A,0000F,1109B,00009,00005
00000000,40000000,02341E36,00000001
LSU Stalls
#30,68,12,55,7,0,0,pm_fxu_stall,FXU Stalls
##12091,11099,00001,11099,00009,00005
00000000,40000008,22320232,00000001
FXU Stalls
#31,57,11,55,9,0,0,pm_fpu_stall,FPU Stalls
##10090,1109B,00001,11098,00009,00005
00000000,40000000,20360230,00000001
FPU Stalls
#32,115,7,116,116,0,0,pm_queue_full,BRQ LRQ LMQ queue full
##820E7,100C5,110C2,C30E7,00009,00005
00000000,400B0009,CE8A84CE,00000000
BRQ LRQ LMQ queue full
#33,41,49,40,46,0,0,pm_issueq_full,FPU FX full
##100C3,100C7,110C0,110C4,00009,00005
00000000,40000000,868E8088,00000000
FPU FX full
#34,11,114,48,11,0,0,pm_mapper_full1,CR CTR GPR mapper full
##100C4,100C6,130E5,110C1,00009,00005
00000000,40000002,888CCA82,00000000
CR CTR GPR mapper full
#35,35,204,188,59,0,0,pm_mapper_full2,FPR XER mapper full
##100C1,100C2,C709B,00001,00009,00005
00000000,41030002,82843602,00000001
FPR XER mapper full
#36,198,193,106,112,0,0,pm_misc_load,Non-cachable loads and stcx events
##820E1,820E5,C50C1,C50C5,00009,00005
00000000,0438000C,C2CA828A,00000001
Non-cachable loads and stcx events
#37,117,126,52,57,0,0,pm_ic_demand,ICache demand from BR redirect
##C20E3,C20E7,230E0,230E1,00009,00005
00000000,800C000F,C6CEC0C2,00000000
ICache demand from BR redirect
#38,72,69,54,0,0,0,pm_ic_pref,ICache prefetch
##220E7,220E6,210C7,2208D,00009,00005
00000000,8000000C,CECC8E1A,00000000
ICache prefetch
#39,69,67,60,59,0,0,pm_ic_miss,ICache misses
##12099,120E7,C30E4,00001,00009,00005
00000000,4003000E,32CEC802,00000001
ICache misses
#40,210,184,1,3,0,0,pm_branch_miss,Branch mispredict, TLB and SLB misses
##80088,80088,230E5,230E6,00009,00005
00000000,80800003,1010CACC,00000000
Branch mispredict, TLB and SLB misses
#41,9,8,3,5,0,0,pm_branch1,Branch operations
##23087,23087,23087,23087,00009,00005
00000000,80000003,0E0E0E0E,00000000
Branch operations
#42,64,62,24,59,0,0,pm_branch2,Branch operations
##120E5,120E6,110C6,00001,00009,00005
00000000,4000000C,CACC8C02,00000001
Branch operations
#43,20,21,100,106,0,0,pm_L1_tlbmiss,L1 load and TLB misses
##800C7,800C4,C1088,C1090,00009,00005
00000000,00B00000,8E881020,00000000
L1 load and TLB misses
#44,13,137,165,171,0,0,pm_L1_DERAT_miss,L1 store and DERAT misses
##C3087,80090,C1090,C10C3,00009,00005
00000000,00B30000,0E202086,00000000
L1 store and DERAT misses
#45,21,78,101,105,0,0,pm_L1_slbmiss,L1 load and SLB misses
##800C5,800C1,C10C2,C10C6,00009,00005
00000000,00B00000,8A82848C,00000000
L1 load and SLB misses
#46,26,23,103,108,0,0,pm_L1_dtlbmiss_4K,L1 load references and 4K Data TLB references and misses
##C40C2,C40C0,C10C0,C10C4,00009,00005
00000000,08F00000,84808088,00000000
L1 load references and 4K Data TLB references and misses
#47,25,22,166,173,0,0,pm_L1_dtlbmiss_16M,L1 store references and 16M Data TLB references and misses
##C40C6,C40C4,C10C1,C10C5,00009,00005
00000000,08F00000,8C88828A,00000000
L1 store references and 16M Data TLB references and misses
#48,16,18,26,59,0,0,pm_dsource1,L3 cache and memory data access
##C308E,C3087,110C7,00001,00009,00005
00000000,40030000,1C0E8E02,00000001
L3 cache and memory data access
#49,16,18,187,15,0,0,pm_dsource2,L3 cache and memory data access
##C308E,C3087,C309B,C3087,00009,00005
00000000,00030003,1C0E360E,00000000
L3 cache and memory data access
#50,14,16,8,13,0,0,pm_dsource_L2,L2 cache data access
##C3097,C3097,C3097,C3097,00009,00005
00000000,00030003,2E2E2E2E,00000000
L2 cache data access
#51,17,17,10,14,0,0,pm_dsource_L3,L3 cache data access
##C309E,C309E,C309E,C309E,00009,00005
00000000,00030003,3C3C3C3C,00000000
L3 cache data access
#52,78,74,59,63,0,0,pm_isource1,Instruction source information
##2208D,2208D,2208D,22086,00009,00005
00000000,8000000C,1A1A1A0C,00000000
Instruction source information
#53,76,77,55,0,0,0,pm_isource2,Instruction source information
##22086,22086,00001,2208D,00009,00005
00000000,8000000C,0C0C021A,00000001
Instruction source information
#54,77,75,57,61,0,0,pm_isource_L2,L2 instruction source information
##22096,22096,22096,22096,00009,00005
00000000,8000000C,2C2C2C2C,00000000
L2 instruction source information
#55,79,76,58,62,0,0,pm_isource_L3,L3 instruction source information
##2209D,2209D,2209D,2209D,00009,00005
00000000,8000000C,3A3A3A3A,00000000
L3 instruction source information
#56,184,181,154,163,0,0,pm_pteg_source1,PTEG source information
##83097,83097,83097,83097,00009,00005
00000000,00020003,2E2E2E2E,00000000
PTEG source information
#57,187,182,156,164,0,0,pm_pteg_source2,PTEG source information
##8309E,8309E,8309E,8309E,00009,00005
00000000,00020003,3C3C3C3C,00000000
PTEG source information
#58,183,183,189,165,0,0,pm_pteg_source3,PTEG source information
##83087,83087,8309B,83087,00009,00005
00000000,00020003,0E0E360E,00000000
PTEG source information
#59,186,64,51,16,0,0,pm_pteg_source4,L3 PTEG and group disptach events
##8308E,00002,00002,C10C7,00009,00005
00000000,00320000,1C04048E,00000000
L3 PTEG and group disptach events
#60,83,82,64,69,0,0,pm_L2SA_ld,L2 slice A load events
##701C0,721E0,711C0,731E0,00009,00005
00000000,30554005,80C080C0,00000000
L2 slice A load events
#61,85,84,66,71,0,0,pm_L2SA_st,L2 slice A store events
##702C0,722E0,712C0,732E0,00009,00005
00000000,30558005,80C080C0,00000000
L2 slice A store events
#62,87,87,68,74,0,0,pm_L2SA_st2,L2 slice A store events
##703C0,723E0,713C0,733E0,00009,00005
00000000,3055C005,80C080C0,00000000
L2 slice A store events
#63,91,90,72,77,0,0,pm_L2SB_ld,L2 slice B load events
##701C1,721E1,711C1,731E1,00009,00005
00000000,30554005,82C282C2,00000000
L2 slice B load events
#64,93,92,74,79,0,0,pm_L2SB_st,L2 slice B store events
##702C1,722E1,712C1,732E1,00009,00005
00000000,30558005,82C282C2,00000000
L2 slice B store events
#65,95,95,76,82,0,0,pm_L2SB_st2,L2 slice B store events
##703C1,723E1,713C1,733E1,00009,00005
00000000,3055C005,82C282C2,00000000
L2 slice B store events
#66,99,98,80,85,0,0,pm_L2SB_ld,L2 slice C load events
##701C2,721E2,711C2,731E2,00009,00005
00000000,30554005,84C484C4,00000000
L2 slice C load events
#67,101,100,82,87,0,0,pm_L2SB_st,L2 slice C store events
##702C2,722E2,712C2,732E2,00009,00005
00000000,30558005,84C484C4,00000000
L2 slice C store events
#68,103,103,84,90,0,0,pm_L2SB_st2,L2 slice C store events
##703C2,723E2,713C2,733E2,00009,00005
00000000,3055C005,84C484C4,00000000
L2 slice C store events
#69,107,71,89,94,0,0,pm_L3SA_trans,L3 slice A state transistions
##720E3,00001,730E3,710C3,00009,00005
00000000,3015000A,C602C686,00000001
L3 slice A state transistions
#70,73,108,93,98,0,0,pm_L3SB_trans,L3 slice B state transistions
##00001,720E4,730E4,710C4,00009,00005
00000000,30150006,02C8C888,00000001
L3 slice B state transistions
#71,73,111,97,102,0,0,pm_L3SC_trans,L3 slice C state transistions
##00001,720E5,730E5,710C5,00009,00005
00000000,30150006,02CACA8A,00000001
L3 slice C state transistions
#72,82,86,63,73,0,0,pm_L2SA_trans,L2 slice A state transistions
##720E0,700C0,730E0,710C0,00009,00005
00000000,3055000A,C080C080,00000000
L2 slice A state transistions
#73,90,94,71,81,0,0,pm_L2SB_trans,L2 slice B state transistions
##720E1,700C1,730E1,710C1,00009,00005
00000000,3055000A,C282C282,00000000
L2 slice B state transistions
#74,98,102,79,89,0,0,pm_L2SC_trans,L2 slice C state transistions
##720E2,700C2,730E2,710C2,00009,00005
00000000,3055000A,C484C484,00000000
L2 slice C state transistions
#75,106,107,91,99,0,0,pm_L3SAB_retry,L3 slice A/B snoop retry and all CI/CO busy
##721E3,721E4,731E3,731E4,00009,00005
00000000,3005100F,C6C8C6C8,00000000
L3 slice A/B snoop retry and all CI/CO busy
#76,108,109,88,96,0,0,pm_L3SAB_hit,L3 slice A/B hit and reference
##701C3,701C4,711C3,711C4,00009,00005
00000000,30501000,86888688,00000000
L3 slice A/B hit and reference
#77,112,112,99,100,0,0,pm_L3SC_retry_hit,L3 slice C hit & snoop retry
##721E5,701C5,731E5,711C5,00009,00005
00000000,3055100A,CA8ACA8A,00000000
L3 slice C hit & snoop retry
#78,55,54,38,43,0,0,pm_fpu1,Floating Point events
##00088,00088,01088,01090,00009,00005
00000000,00000000,10101020,00000000
Floating Point events
#79,56,53,39,44,0,0,pm_fpu2,Floating Point events
##00090,00090,01090,01088,00009,00005
00000000,00000000,20202010,00000000
Floating Point events
#80,54,55,30,40,0,0,pm_fpu3,Floating point events
##02088,02088,010C3,010C7,00009,00005
00000000,0000000C,1010868E,00000000
Floating point events
#81,58,56,55,115,0,0,pm_fpu4,Floating point events
##02090,02090,00001,C5090,00009,00005
00000000,0430000C,20200220,00000001
Floating point events
#82,40,48,29,39,0,0,pm_fpu5,Floating point events by unit
##000C2,000C6,010C2,010C6,00009,00005
00000000,00000000,848C848C,00000000
Floating point events by unit
#83,37,45,31,41,0,0,pm_fpu6,Floating point events by unit
##020E0,020E4,010C0,010C4,00009,00005
00000000,0000000C,C0C88088,00000000
Floating point events by unit
#84,38,46,33,42,0,0,pm_fpu7,Floating point events by unit
##000C0,000C4,010C1,010C5,00009,00005
00000000,00000000,8088828A,00000000
Floating point events by unit
#85,43,51,55,37,0,0,pm_fpu8,Floating point events by unit
##020E1,020E5,00001,030E0,00009,00005
00000000,0000000D,C2CA02C0,00000001
Floating point events by unit
#86,42,50,105,111,0,0,pm_fpu9,Floating point events by unit
##020E3,020E7,C50C0,C50C4,00009,00005
00000000,0430000C,C6CE8088,00000000
Floating point events by unit
#87,39,47,55,42,0,0,pm_fpu10,Floating point events by unit
##000C1,000C5,00001,010C5,00009,00005
00000000,00000000,828A028A,00000001
Floating point events by unit
#88,36,44,30,59,0,0,pm_fpu11,Floating point events by unit
##000C3,000C7,010C3,00001,00009,00005
00000000,00000000,868E8602,00000001
Floating point events by unit
#89,44,52,105,59,0,0,pm_fpu12,Floating point events by unit
##020E2,020E6,C50C0,00001,00009,00005
00000000,0430000C,C4CC8002,00000001
Floating point events by unit
#90,59,57,42,49,0,0,pm_fxu1,Fixed Point events
##00012,00012,00012,00012,00009,00005
00000000,00000000,24242424,00000000
Fixed Point events
#91,171,172,45,47,0,0,pm_fxu2,Fixed Point events
##00002,12091,13088,11090,00009,00005
00000000,40000006,04221020,00000001
Fixed Point events
#92,4,4,43,50,0,0,pm_fxu3,Fixed Point events
##400C3,400C4,130E2,130E6,00009,00005
00000000,40400003,8688C4CC,00000000
Fixed Point events
#93,206,203,171,178,0,0,pm_smt_priorities1,Thread priority events
##420E3,420E6,430E3,430E4,00009,00005
00000000,0005000F,C6CCC6C8,00000000
Thread priority events
#94,205,202,173,180,0,0,pm_smt_priorities2,Thread priority events
##420E2,420E5,430E5,430E6,00009,00005
00000000,0005000F,C4CACACC,00000000
Thread priority events
#95,204,201,175,182,0,0,pm_smt_priorities3,Thread priority events
##420E1,420E4,430E2,430E1,00009,00005
00000000,0005000F,C2C8C4C2,00000000
Thread priority events
#96,203,68,177,59,0,0,pm_smt_priorities4,Thread priority events
##420E0,0000B,430E0,00001,00009,00005
00000000,0005000A,C016C002,00000001
Thread priority events
#97,202,196,55,176,0,0,pm_smt_both,Thread common events
##0000B,00013,00001,41084,00009,00005
00000000,00100000,16260208,00000001
Thread common events
#98,196,71,182,189,0,0,pm_smt_selection,Thread selection
##800C3,00001,410C0,410C1,00009,00005
00000000,00900000,86028082,00000001
Thread selection
#99,73,0,178,185,0,0,pm_smt_selectover1,Thread selection overide
##00001,400C0,410C2,410C4,00009,00005
00000000,00500000,02808488,00000001
Thread selection overide
#100,73,15,180,187,0,0,pm_smt_selectover2,Thread selection overide
##00001,0000F,410C5,410C3,00009,00005
00000000,00100000,021E8A86,00000001
Thread selection overide
#101,27,27,17,23,0,0,pm_fabric1,Fabric events
##700C7,720E7,710C7,730E7,00009,00005
00000000,30550005,8ECE8ECE,00000000
Fabric events
#102,32,29,20,28,0,0,pm_fabric2,Fabric data movement
##701C7,721E7,711C7,731E7,00009,00005
00000000,30550085,8ECE8ECE,00000000
Fabric data movement
#103,33,33,21,27,0,0,pm_fabric3,Fabric data movement
##703C7,723E7,713C7,733E7,00009,00005
00000000,30550185,8ECE8ECE,00000000
Fabric data movement
#104,31,28,15,24,0,0,pm_fabric4,Fabric data movement
##702C7,722E7,130E3,712C7,00009,00005
00000000,70540106,8ECEC68E,00000000
Fabric data movement
#105,193,185,161,166,0,0,pm_snoop1,Snoop retry
##700C6,720E6,710C6,730E6,00009,00005
00000000,30550005,8CCC8CCC,00000000
Snoop retry
#106,194,189,160,59,0,0,pm_snoop2,Snoop read retry
##705C6,725E6,715C6,00001,00009,00005
00000000,30540A04,8CCC8C02,00000001
Snoop read retry
#107,197,150,162,127,0,0,pm_snoop3,Snoop write retry
##706C6,726E6,716C6,736E6,00009,00005
00000000,30550C05,8CCC8CCC,00000000
Snoop write retry
#108,192,149,159,126,0,0,pm_snoop4,Snoop partial write retry
##707C6,727E6,717C6,737E6,00009,00005
00000000,30550E05,8CCC8CCC,00000000
Snoop partial write retry
#109,156,155,125,20,0,0,pm_mem_rq,Memory read queue dispatch
##701C6,721E6,711C6,130E7,00009,00005
00000000,70540205,8CCC8CCE,00000000
Memory read queue dispatch
#110,155,148,126,21,0,0,pm_mem_read,Memory read complete and cancel
##702C6,722E6,712C6,00003,00009,00005
00000000,30540404,8CCC8C06,00000000
Memory read complete and cancel
#111,159,156,128,132,0,0,pm_mem_wq,Memory write queue dispatch
##703C6,723E6,713C6,733E6,00009,00005
00000000,30550605,8CCC8CCC,00000000
Memory write queue dispatch
#112,153,152,124,128,0,0,pm_mem_pwq,Memory partial write queue
##704C6,724E6,714C6,734E6,00009,00005
00000000,30550805,8CCC8CCC,00000000
Memory partial write queue
#113,171,173,185,158,0,0,pm_threshold,Thresholding
##00002,820E2,0000B,00014,00009,00005
00000000,00080004,04C41628,00000001
Thresholding
#114,171,179,137,146,0,0,pm_mrk_grp1,Marked group events
##00002,820E3,00005,00013,00009,00005
00000000,00080004,04C60A26,00000001
Marked group events
#115,172,158,138,147,0,0,pm_mrk_grp2,Marked group events
##00015,00005,C70E4,12091,00009,00005
00000000,41030002,2A0AC822,00000001
Marked group events
#116,160,162,129,135,0,0,pm_mrk_dsource1,Marked data from
##C7087,C70A0,C70A2,C70A2,00009,00005
00000000,010B0003,0E404444,00000001
Marked data from
#117,161,160,55,44,0,0,pm_mrk_dsource2,Marked data from
##C7097,C70A2,00001,01088,00009,00005
00000000,010B0000,2E440210,00000001
Marked data from
#118,163,166,131,138,0,0,pm_mrk_dsource3,Marked data from
##C708E,C70A4,C70A6,C70A6,00009,00005
00000000,010B0003,1C484C4C,00000001
Marked data from
#119,166,161,130,143,0,0,pm_mrk_dsource4,Marked data from
##C70A1,C70A3,C7097,C70A1,00009,00005
00000000,010B0003,42462E42,00000001
Marked data from
#120,164,164,133,141,0,0,pm_mrk_dsource5,Marked data from
##C709E,C70A6,C70A0,C70A0,00009,00005
00000000,010B0003,3C4C4040,00000001
Marked data from
#121,162,161,55,137,0,0,pm_mrk_dsource6,Marked data from
##C70A3,C70A3,00001,C70A3,00009,00005
00000000,010B0001,46460246,00000001
Marked data from
#122,165,165,132,140,0,0,pm_mrk_dsource7,Marked data from
##C70A7,C70A7,C709E,C70A7,00009,00005
00000000,010B0003,4E4E3C4E,00000001
Marked data from
#123,168,168,135,144,0,0,pm_mrk_lbmiss,Marked TLB and SLB misses
##C40C1,C40C5,C50C6,C50C7,00009,00005
00000000,0CF00000,828A8C8E,00000001
Marked TLB and SLB misses
#124,170,170,55,144,0,0,pm_mrk_lbref,Marked TLB and SLB references
##C40C3,C40C7,00001,C50C7,00009,00005
00000000,0CF00000,868E028E,00000001
Marked TLB and SLB references
#125,175,71,150,134,0,0,pm_mrk_lsmiss,Marked load and store miss
##82088,00001,00003,00005,00009,00005
00000000,00080008,1002060A,00000001
Marked load and store miss
#126,179,179,148,160,0,0,pm_mrk_ulsflush,Mark unaligned load and store flushes
##00003,820E3,81090,81090,00009,00005
00000000,00280004,06C62020,00000001
Mark unaligned load and store flushes
#127,178,178,136,148,0,0,pm_mrk_misc,Misc marked instructions
##820E6,00003,00014,0000B,00009,00005
00000000,00080008,CC062816,00000001
Misc marked instructions
#128,13,74,165,106,0,0,pm_lsref_L1,Load/Store operations and L1 activity
##C3087,2208D,C1090,C1090,00009,00005
00000000,80330004,0E1A2020,00000000
Load/Store operations and L1 activity
#129,16,18,165,106,0,0,pm_lsref_L2L3,Load/Store operations and L2,L3 activity
##C308E,C3087,C1090,C1090,00009,00005
00000000,00330000,1C0E2020,00000000
Load/Store operations and L2,L3 activity
#130,81,21,165,106,0,0,pm_lsref_tlbmiss,Load/Store operations and TLB misses
##800C0,800C4,C1090,C1090,00009,00005
00000000,00B00000,80882020,00000000
Load/Store operations and TLB misses
#131,16,18,100,171,0,0,pm_Dmiss,Data cache misses
##C308E,C3087,C1088,C10C3,00009,00005
00000000,00330000,1C0E1086,00000000
Data cache misses
#132,12,69,61,91,0,0,pm_prefetchX,Prefetch events
##0000F,220E6,C70E7,C50C3,00009,00005
00000000,85330006,1ECCCE86,00000000
Prefetch events
#133,9,8,3,1,0,0,pm_branchX,Branch operations
##23087,23087,23087,230E4,00009,00005
00000000,80000003,0E0E0EC8,00000000
Branch operations
#134,43,51,30,37,0,0,pm_fpuX1,Floating point events by unit
##020E1,020E5,010C3,030E0,00009,00005
00000000,0000000D,C2CA86C0,00000000
Floating point events by unit
#135,39,47,33,42,0,0,pm_fpuX2,Floating point events by unit
##000C1,000C5,010C1,010C5,00009,00005
00000000,00000000,828A828A,00000000
Floating point events by unit
#136,36,44,30,40,0,0,pm_fpuX3,Floating point events by unit
##000C3,000C7,010C3,010C7,00009,00005
00000000,00000000,868E868E,00000000
Floating point events by unit
#137,56,54,165,106,0,0,pm_fpuX4,Floating point and L1 events
##00090,00088,C1090,C1090,00009,00005
00000000,00300000,20102020,00000000
Floating point and L1 events
#138,58,56,30,40,0,0,pm_fpuX5,Floating point events
##02090,02090,010C3,010C7,00009,00005
00000000,0000000C,2020868E,00000000
Floating point events
#139,55,53,39,44,0,0,pm_fpuX6,Floating point events
##00088,00090,01090,01088,00009,00005
00000000,00000000,10202010,00000000
Floating point events
#140,12,58,6,44,0,0,pm_hpmcount1,HPM group for set 1
##0000F,00014,0000F,01088,00009,00005
00000000,00000000,1E281E10,00000000
HPM group for set 1
#141,12,56,56,115,0,0,pm_hpmcount2,HPM group for set 2
##0000F,02090,00009,C5090,00009,00005
00000000,04300004,1E201220,00000000
HPM group for set 2
#142,12,72,100,171,0,0,pm_hpmcount3,HPM group for set 3
##0000F,120E1,C1088,C10C3,00009,00005
00000000,40300004,1EC21086,00000000
HPM group for set 3
#143,210,15,165,106,0,0,pm_hpmcount4,HPM group for set 7
##80088,0000F,C1090,C1090,00009,00005
00000000,00B00000,101E2020,00000000
HPM group for set 7
#144,56,54,6,59,0,0,pm_1flop_with_fma,One flop instructions plus FMA
##00090,00088,0000F,00001,00009,00005
00000000,00000000,20101E02,00000000
One flop instructions plus FMA