| diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c |
| index f737960..b1f8164 100644 |
| |
| |
| @@ -509,6 +509,8 @@ i915_pci_remove(struct pci_dev *pdev) |
| { |
| struct drm_device *dev = pci_get_drvdata(pdev); |
| |
| + pci_disable_device(pdev); /* core did previous enable */ |
| + |
| drm_put_dev(dev); |
| } |
| |
| diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c |
| index 300f64b..2e3db37 100644 |
| |
| |
| @@ -795,7 +795,8 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp) |
| { |
| struct drm_device *dev = intel_dp->base.base.dev; |
| struct drm_i915_private *dev_priv = dev->dev_private; |
| - u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_STATE_ON_IDLE; |
| + u32 pp, idle_on = PP_ON | PP_SEQUENCE_STATE_ON_IDLE; |
| + u32 idle_on_mask = PP_ON | PP_SEQUENCE_STATE_MASK; |
| |
| if (I915_READ(PCH_PP_STATUS) & PP_ON) |
| return true; |
| @@ -816,7 +817,7 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp) |
| */ |
| msleep(300); |
| |
| - if (wait_for((I915_READ(PCH_PP_STATUS) & idle_on_mask) == idle_on_mask, |
| + if (wait_for((I915_READ(PCH_PP_STATUS) & idle_on_mask) == idle_on, |
| 5000)) |
| DRM_ERROR("panel on wait timed out: 0x%08x\n", |
| I915_READ(PCH_PP_STATUS)); |
| @@ -922,6 +923,7 @@ static void intel_dp_prepare(struct drm_encoder *encoder) |
| |
| if (is_edp(intel_dp)) { |
| ironlake_edp_backlight_off(dev); |
| + ironlake_edp_panel_off(dev); |
| ironlake_edp_panel_on(intel_dp); |
| if (!is_pch_edp(intel_dp)) |
| ironlake_edp_pll_on(encoder); |