| 2004-07-09 Jakub Jelinek <jakub@redhat.com> |
| |
| * Backport from mainline: |
| 2004-07-08 Paolo Bonzini <bonzini@gnu.org> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| * config/i386/i386.c (override_options): Enable |
| SSE prefetches with -mtune, as long as we are |
| compiling for i686 or higher. All i686 processors |
| accept SSE prefetches as NOPS, some i586's don't. |
| |
| 2004-07-07 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/i386/i386.c (override_options): Don't set x86_prefetch_sse |
| from -mtune= option. |
| |
| 2004-07-08 Jakub Jelinek <jakub@redhat.com> |
| |
| * gcc.mist-tests/i386-prefetch.exp (PREFETCH_SSE): Change all |
| -march=i386 into -march=i686. Add -march=i686 -mcpu=prescott and |
| -march=prescott. |
| |
| 2003-08-04 Janis Johnson <janis187@us.ibm.com> |
| |
| PR target/11739 |
| * gcc.misc-tests/i386-prefetch.exp: Use -march=i386 when specifying |
| a value for -mcpu. |
| |
| |
| |
| @@ -1064,11 +1064,17 @@ override_options () |
| ix86_cpu = processor_alias_table[i].processor; |
| if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT)) |
| error ("CPU you selected does not support x86-64 instruction set"); |
| + |
| + /* Intel CPUs have always interpreted SSE prefetch instructions as |
| + NOPs; so, we can enable SSE prefetch instructions even when |
| + -mtune (rather than -march) points us to a processor that has them. |
| + However, the VIA C3 gives a SIGILL, so we only do that for i686 and |
| + higher processors. */ |
| + if (TARGET_CMOVE && (processor_alias_table[i].flags & PTA_PREFETCH_SSE)) |
| + x86_prefetch_sse = true; |
| break; |
| } |
| |
| - if (processor_alias_table[i].flags & PTA_PREFETCH_SSE) |
| - x86_prefetch_sse = true; |
| if (i == pta_size) |
| error ("bad value (%s) for -mcpu= switch", ix86_cpu_string); |
| |
| |
| |
| @@ -24,14 +24,14 @@ |
| # Do not generate prefetch instructions for the following options. |
| |
| set PREFETCH_NONE [list \ |
| - { -mcpu=i386 } \ |
| - { -mcpu=i486 } \ |
| - { -mcpu=i586 } \ |
| - { -mcpu=i686 } \ |
| - { -mcpu=pentium2 } \ |
| - { -mcpu=k6 } \ |
| - { -mcpu=k6-2 } \ |
| - { -mcpu=k6-3 } \ |
| + { -march=i386 -mcpu=i386 } \ |
| + { -march=i386 -mcpu=i486 } \ |
| + { -march=i386 -mcpu=i586 } \ |
| + { -march=i386 -mcpu=i686 } \ |
| + { -march=i386 -mcpu=pentium2 } \ |
| + { -march=i386 -mcpu=k6 } \ |
| + { -march=i386 -mcpu=k6-2 } \ |
| + { -march=i386 -mcpu=k6-3 } \ |
| { -march=i386 } \ |
| { -march=i486 } \ |
| { -march=i586 } \ |
| @@ -44,12 +44,14 @@ set PREFETCH_NONE [list \ |
| # instructions as nops. |
| |
| set PREFETCH_SSE [list \ |
| - { -mcpu=pentium3 } \ |
| - { -mcpu=pentium4 } \ |
| - { -mcpu=athlon } \ |
| - { -mcpu=athlon-4 } \ |
| + { -march=i686 -mcpu=pentium3 } \ |
| + { -march=i686 -mcpu=pentium4 } \ |
| + { -march=i686 -mcpu=prescott } \ |
| + { -march=i686 -mcpu=athlon } \ |
| + { -march=i686 -mcpu=athlon-4 } \ |
| { -march=pentium3 } \ |
| - { -march=pentium4 } ] |
| + { -march=pentium4 } \ |
| + { -march=prescott } ] |
| |
| # Generate 3DNow! prefetch instructions for the following. |
| |