|
Packit |
577717 |
/*
|
|
Packit |
577717 |
* Copyright (c) 2009 Google, Inc
|
|
Packit |
577717 |
* Contributed by Stephane Eranian <eranian@google.com>
|
|
Packit |
577717 |
*
|
|
Packit |
577717 |
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
Packit |
577717 |
* of this software and associated documentation files (the "Software"), to deal
|
|
Packit |
577717 |
* in the Software without restriction, including without limitation the rights
|
|
Packit |
577717 |
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
|
|
Packit |
577717 |
* of the Software, and to permit persons to whom the Software is furnished to do so,
|
|
Packit |
577717 |
* subject to the following conditions:
|
|
Packit |
577717 |
*
|
|
Packit |
577717 |
* The above copyright notice and this permission notice shall be included in all
|
|
Packit |
577717 |
* copies or substantial portions of the Software.
|
|
Packit |
577717 |
*
|
|
Packit |
577717 |
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
|
|
Packit |
577717 |
* INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
|
|
Packit |
577717 |
* PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
Packit |
577717 |
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
|
|
Packit |
577717 |
* CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
|
|
Packit |
577717 |
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
Packit |
577717 |
*
|
|
Packit |
577717 |
* This file is part of libpfm, a performance monitoring support library for
|
|
Packit |
577717 |
* applications on Linux.
|
|
Packit |
577717 |
*/
|
|
Packit |
577717 |
|
|
Packit |
577717 |
#define CACHE_ST_ACCESS(n, d, e) \
|
|
Packit |
577717 |
{\
|
|
Packit |
577717 |
.name = #n"-STORES",\
|
|
Packit |
577717 |
.desc = d" store accesses",\
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_##e,\
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,\
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,\
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,\
|
|
Packit |
577717 |
.equiv = "PERF_COUNT_HW_CACHE_"#e":WRITE:ACCESS"\
|
|
Packit |
577717 |
},\
|
|
Packit |
577717 |
{\
|
|
Packit |
577717 |
.name = #n"-STORE-MISSES",\
|
|
Packit |
577717 |
.desc = d" store misses",\
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_##e,\
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,\
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,\
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,\
|
|
Packit |
577717 |
.equiv = "PERF_COUNT_HW_CACHE_"#e":WRITE:MISS"\
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
|
|
Packit |
577717 |
#define CACHE_PF_ACCESS(n, d, e) \
|
|
Packit |
577717 |
{\
|
|
Packit |
577717 |
.name = #n"-PREFETCHES",\
|
|
Packit |
577717 |
.desc = d" prefetch accesses",\
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_##e,\
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,\
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,\
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,\
|
|
Packit |
577717 |
.equiv = "PERF_COUNT_HW_CACHE_"#e":PREFETCH:ACCESS"\
|
|
Packit |
577717 |
},\
|
|
Packit |
577717 |
{\
|
|
Packit |
577717 |
.name = #n"-PREFETCH-MISSES",\
|
|
Packit |
577717 |
.desc = d" prefetch misses",\
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_##e,\
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,\
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,\
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,\
|
|
Packit |
577717 |
.equiv = "PERF_COUNT_HW_CACHE_"#e":PREFETCH:MISS"\
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
|
|
Packit |
577717 |
|
|
Packit |
577717 |
#define CACHE_LD_ACCESS(n, d, e) \
|
|
Packit |
577717 |
{\
|
|
Packit |
577717 |
.name = #n"-LOADS",\
|
|
Packit |
577717 |
.desc = d" load accesses",\
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_##e,\
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,\
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,\
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,\
|
|
Packit |
577717 |
.equiv = "PERF_COUNT_HW_CACHE_"#e":READ:ACCESS"\
|
|
Packit |
577717 |
},\
|
|
Packit |
577717 |
{\
|
|
Packit |
577717 |
.name = #n"-LOAD-MISSES",\
|
|
Packit |
577717 |
.desc = d" load misses",\
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_##e,\
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,\
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,\
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,\
|
|
Packit |
577717 |
.equiv = "PERF_COUNT_HW_CACHE_"#e":READ:MISS"\
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
|
|
Packit |
577717 |
#define CACHE_ACCESS(n, d, e) \
|
|
Packit |
577717 |
CACHE_LD_ACCESS(n, d, e), \
|
|
Packit |
577717 |
CACHE_ST_ACCESS(n, d, e), \
|
|
Packit |
577717 |
CACHE_PF_ACCESS(n, d, e)
|
|
Packit |
577717 |
|
|
Packit |
577717 |
#define ICACHE_ACCESS(n, d, e) \
|
|
Packit |
577717 |
CACHE_LD_ACCESS(n, d, e), \
|
|
Packit |
577717 |
CACHE_PF_ACCESS(n, d, e)
|
|
Packit |
577717 |
|
|
Packit |
577717 |
static perf_event_t perf_static_events[]={
|
|
Packit |
577717 |
PCL_EVT_HW(CPU_CYCLES),
|
|
Packit |
577717 |
PCL_EVT_AHW(CYCLES, CPU_CYCLES),
|
|
Packit |
577717 |
PCL_EVT_AHW(CPU-CYCLES, CPU_CYCLES),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(INSTRUCTIONS),
|
|
Packit |
577717 |
PCL_EVT_AHW(INSTRUCTIONS, INSTRUCTIONS),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(CACHE_REFERENCES),
|
|
Packit |
577717 |
PCL_EVT_AHW(CACHE-REFERENCES, CACHE_REFERENCES),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(CACHE_MISSES),
|
|
Packit |
577717 |
PCL_EVT_AHW(CACHE-MISSES,CACHE_MISSES),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(BRANCH_INSTRUCTIONS),
|
|
Packit |
577717 |
PCL_EVT_AHW(BRANCH-INSTRUCTIONS, BRANCH_INSTRUCTIONS),
|
|
Packit |
577717 |
PCL_EVT_AHW(BRANCHES, BRANCH_INSTRUCTIONS),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(BRANCH_MISSES),
|
|
Packit |
577717 |
PCL_EVT_AHW(BRANCH-MISSES, BRANCH_MISSES),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(BUS_CYCLES),
|
|
Packit |
577717 |
PCL_EVT_AHW(BUS-CYCLES, BUS_CYCLES),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(STALLED_CYCLES_FRONTEND),
|
|
Packit |
577717 |
PCL_EVT_AHW(STALLED-CYCLES-FRONTEND, STALLED_CYCLES_FRONTEND),
|
|
Packit |
577717 |
PCL_EVT_AHW(IDLE-CYCLES-FRONTEND, STALLED_CYCLES_FRONTEND),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(STALLED_CYCLES_BACKEND),
|
|
Packit |
577717 |
PCL_EVT_AHW(STALLED-CYCLES-BACKEND, STALLED_CYCLES_BACKEND),
|
|
Packit |
577717 |
PCL_EVT_AHW(IDLE-CYCLES-BACKEND, STALLED_CYCLES_BACKEND),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_HW(REF_CPU_CYCLES),
|
|
Packit |
577717 |
PCL_EVT_AHW(REF-CYCLES,REF_CPU_CYCLES),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_SW(CPU_CLOCK),
|
|
Packit |
577717 |
PCL_EVT_ASW(CPU-CLOCK, CPU_CLOCK),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_SW(TASK_CLOCK),
|
|
Packit |
577717 |
PCL_EVT_ASW(TASK-CLOCK, TASK_CLOCK),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_SW(PAGE_FAULTS),
|
|
Packit |
577717 |
PCL_EVT_ASW(PAGE-FAULTS, PAGE_FAULTS),
|
|
Packit |
577717 |
PCL_EVT_ASW(FAULTS, PAGE_FAULTS),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_SW(CONTEXT_SWITCHES),
|
|
Packit |
577717 |
PCL_EVT_ASW(CONTEXT-SWITCHES, CONTEXT_SWITCHES),
|
|
Packit |
577717 |
PCL_EVT_ASW(CS, CONTEXT_SWITCHES),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_SW(CPU_MIGRATIONS),
|
|
Packit |
577717 |
PCL_EVT_ASW(CPU-MIGRATIONS, CPU_MIGRATIONS),
|
|
Packit |
577717 |
PCL_EVT_ASW(MIGRATIONS, CPU_MIGRATIONS),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_SW(PAGE_FAULTS_MIN),
|
|
Packit |
577717 |
PCL_EVT_ASW(MINOR-FAULTS, PAGE_FAULTS_MIN),
|
|
Packit |
577717 |
|
|
Packit |
577717 |
PCL_EVT_SW(PAGE_FAULTS_MAJ),
|
|
Packit |
577717 |
PCL_EVT_ASW(MAJOR-FAULTS, PAGE_FAULTS_MAJ),
|
|
Packit |
577717 |
{
|
|
Packit |
577717 |
.name = "PERF_COUNT_HW_CACHE_L1D",
|
|
Packit |
577717 |
.desc = "L1 data cache",
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_L1D,
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,
|
|
Packit |
577717 |
.numasks = 5,
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,
|
|
Packit |
577717 |
.ngrp = 2,
|
|
Packit |
577717 |
.umasks = {
|
|
Packit |
577717 |
{ .uname = "READ",
|
|
Packit |
577717 |
.udesc = "read access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_READ << 8,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "WRITE",
|
|
Packit |
577717 |
.udesc = "write access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_WRITE << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "PREFETCH",
|
|
Packit |
577717 |
.udesc = "prefetch access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_PREFETCH << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "ACCESS",
|
|
Packit |
577717 |
.udesc = "hit access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "MISS",
|
|
Packit |
577717 |
.udesc = "miss access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_MISS << 16,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
CACHE_ACCESS(L1-DCACHE, "L1 cache", L1D),
|
|
Packit |
577717 |
{
|
|
Packit |
577717 |
.name = "PERF_COUNT_HW_CACHE_L1I",
|
|
Packit |
577717 |
.desc = "L1 instruction cache",
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_L1I,
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,
|
|
Packit |
577717 |
.numasks = 4,
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,
|
|
Packit |
577717 |
.ngrp = 2,
|
|
Packit |
577717 |
.umasks = {
|
|
Packit |
577717 |
{ .uname = "READ",
|
|
Packit |
577717 |
.udesc = "read access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_READ << 8,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "PREFETCH",
|
|
Packit |
577717 |
.udesc = "prefetch access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_PREFETCH << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "ACCESS",
|
|
Packit |
577717 |
.udesc = "hit access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "MISS",
|
|
Packit |
577717 |
.udesc = "miss access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_MISS << 16,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
ICACHE_ACCESS(L1-ICACHE, "L1I cache", L1I),
|
|
Packit |
577717 |
{
|
|
Packit |
577717 |
.name = "PERF_COUNT_HW_CACHE_LL",
|
|
Packit |
577717 |
.desc = "Last level cache",
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_LL,
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,
|
|
Packit |
577717 |
.numasks = 5,
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,
|
|
Packit |
577717 |
.ngrp = 2,
|
|
Packit |
577717 |
.umasks = {
|
|
Packit |
577717 |
{ .uname = "READ",
|
|
Packit |
577717 |
.udesc = "read access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_READ << 8,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "WRITE",
|
|
Packit |
577717 |
.udesc = "write access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_WRITE << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "PREFETCH",
|
|
Packit |
577717 |
.udesc = "prefetch access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_PREFETCH << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "ACCESS",
|
|
Packit |
577717 |
.udesc = "hit access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "MISS",
|
|
Packit |
577717 |
.udesc = "miss access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_MISS << 16,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
CACHE_ACCESS(LLC, "Last level cache", LL),
|
|
Packit |
577717 |
{
|
|
Packit |
577717 |
.name = "PERF_COUNT_HW_CACHE_DTLB",
|
|
Packit |
577717 |
.desc = "Data Translation Lookaside Buffer",
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_DTLB,
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,
|
|
Packit |
577717 |
.numasks = 5,
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,
|
|
Packit |
577717 |
.ngrp = 2,
|
|
Packit |
577717 |
.umasks = {
|
|
Packit |
577717 |
{ .uname = "READ",
|
|
Packit |
577717 |
.udesc = "read access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_READ << 8,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "WRITE",
|
|
Packit |
577717 |
.udesc = "write access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_WRITE << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "PREFETCH",
|
|
Packit |
577717 |
.udesc = "prefetch access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_PREFETCH << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "ACCESS",
|
|
Packit |
577717 |
.udesc = "hit access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "MISS",
|
|
Packit |
577717 |
.udesc = "miss access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_MISS << 16,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
CACHE_ACCESS(DTLB, "Data TLB", DTLB),
|
|
Packit |
577717 |
{
|
|
Packit |
577717 |
.name = "PERF_COUNT_HW_CACHE_ITLB",
|
|
Packit |
577717 |
.desc = "Instruction Translation Lookaside Buffer",
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_ITLB,
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,
|
|
Packit |
577717 |
.numasks = 3,
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,
|
|
Packit |
577717 |
.ngrp = 2,
|
|
Packit |
577717 |
.umasks = {
|
|
Packit |
577717 |
{ .uname = "READ",
|
|
Packit |
577717 |
.udesc = "read access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_READ << 8,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "ACCESS",
|
|
Packit |
577717 |
.udesc = "hit access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "MISS",
|
|
Packit |
577717 |
.udesc = "miss access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_MISS << 16,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
CACHE_LD_ACCESS(ITLB, "Instruction TLB", ITLB),
|
|
Packit |
577717 |
{
|
|
Packit |
577717 |
.name = "PERF_COUNT_HW_CACHE_BPU",
|
|
Packit |
577717 |
.desc = "Branch Prediction Unit",
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_BPU,
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,
|
|
Packit |
577717 |
.numasks = 3,
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,
|
|
Packit |
577717 |
.ngrp = 2,
|
|
Packit |
577717 |
.umasks = {
|
|
Packit |
577717 |
{ .uname = "READ",
|
|
Packit |
577717 |
.udesc = "read access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_READ << 8,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "ACCESS",
|
|
Packit |
577717 |
.udesc = "hit access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "MISS",
|
|
Packit |
577717 |
.udesc = "miss access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_MISS << 16,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
CACHE_LD_ACCESS(BRANCH, "Branch ", BPU),
|
|
Packit |
577717 |
{
|
|
Packit |
577717 |
.name = "PERF_COUNT_HW_CACHE_NODE",
|
|
Packit |
577717 |
.desc = "Node memory access",
|
|
Packit |
577717 |
.id = PERF_COUNT_HW_CACHE_NODE,
|
|
Packit |
577717 |
.type = PERF_TYPE_HW_CACHE,
|
|
Packit |
577717 |
.numasks = 5,
|
|
Packit |
577717 |
.modmsk = PERF_ATTR_HW,
|
|
Packit |
577717 |
.umask_ovfl_idx = -1,
|
|
Packit |
577717 |
.ngrp = 2,
|
|
Packit |
577717 |
.umasks = {
|
|
Packit |
577717 |
{ .uname = "READ",
|
|
Packit |
577717 |
.udesc = "read access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_READ << 8,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "WRITE",
|
|
Packit |
577717 |
.udesc = "write access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_WRITE << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "PREFETCH",
|
|
Packit |
577717 |
.udesc = "prefetch access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_OP_PREFETCH << 8,
|
|
Packit |
577717 |
.grpid = 0,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "ACCESS",
|
|
Packit |
577717 |
.udesc = "hit access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
{ .uname = "MISS",
|
|
Packit |
577717 |
.udesc = "miss access",
|
|
Packit |
577717 |
.uid = PERF_COUNT_HW_CACHE_RESULT_MISS << 16,
|
|
Packit |
577717 |
.uflags= PERF_FL_DEFAULT,
|
|
Packit |
577717 |
.grpid = 1,
|
|
Packit |
577717 |
}
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
},
|
|
Packit |
577717 |
CACHE_ACCESS(NODE, "Node ", NODE)
|
|
Packit |
577717 |
};
|
|
Packit |
577717 |
#define PME_PERF_EVENT_COUNT (sizeof(perf_static_events)/sizeof(perf_event_t))
|