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.TH LIBPFM 3 "October, 2014" "" "Linux Programmer's Manual"
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.SH NAME
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libpfm_intel_bdw - support for Intel Broadwell core PMU
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.SH SYNOPSIS
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.nf
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.B #include <perfmon/pfmlib.h>
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.sp
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.B PMU name: bdw
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.B PMU desc: Intel Broadwell
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.sp
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.SH DESCRIPTION
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The library supports the Intel Broadwell core PMU. It should be noted that
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this PMU model only covers each core's PMU and not the socket level
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PMU.
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On Broadwell, the number of generic counters depends on the Hyperthreading (HT) mode.
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When HT is on, then only 4 generic counters are available. When HT is off, then 8 generic
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counters are available. The \fBpfm_get_pmu_info()\fR function returns the maximum number
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of generic counters in \fBnum_cntrs\fr.
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.SH MODIFIERS
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The following modifiers are supported on Intel Broadwell processors:
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.TP
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.B u
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Measure at user level which includes privilege levels 1, 2, 3. This corresponds to \fBPFM_PLM3\fR.
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This is a boolean modifier.
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.TP
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.B k
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Measure at kernel level which includes privilege level 0. This corresponds to \fBPFM_PLM0\fR.
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This is a boolean modifier.
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.TP
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.B i
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Invert the meaning of the event. The counter will now count cycles in which the event is \fBnot\fR
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occurring. This is a boolean modifier
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.TP
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.B e
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Enable edge detection, i.e., count only when there is a state transition from no occurrence of the event
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to at least one occurrence. This modifier must be combined with a counter mask modifier (m) with a value greater or equal to one.
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This is a boolean modifier.
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.TP
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.B c
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Set the counter mask value. The mask acts as a threshold. The counter will count the number of cycles
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in which the number of occurrences of the event is greater or equal to the threshold. This is an integer
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modifier with values in the range [0:255].
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.TP
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.B t
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Measure on both threads at the same time assuming hyper-threading is enabled. This is a boolean modifier.
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.TP
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.B ldlat
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Pass a latency threshold to the MEM_TRANS_RETIRED:LOAD_LATENCY event.
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This is an integer attribute that must be in the range [3:65535]. It is required
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for this event. Note that the event must be used with precise sampling (PEBS).
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.TP
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.B intx
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Monitor the event only when executing inside a transactional memory region (in tx). Event
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does not count otherwise. This is a boolean modifiers. Default value is 0.
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.TP
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.B intxcp
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Do not count occurrences of the event when they are inside an aborted transactional memory
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region. This is a boolean modifier. Default value is 0.
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.SH OFFCORE_RESPONSE events
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Intel Broadwell provides two offcore_response events. They are called OFFCORE_RESPONSE_0 and OFFCORE_RESPONSE_1.
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Those events need special treatment in the performance monitoring infrastructure
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because each event uses an extra register to store some settings. Thus, in
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case multiple offcore_response events are monitored simultaneously, the kernel needs
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to manage the sharing of that extra register.
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The offcore_response events are exposed as a normal events by the library. The extra
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settings are exposed as regular umasks. The library takes care of encoding the
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events according to the underlying kernel interface.
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On Intel Broadwell, the umasks are divided into three categories: request, supplier
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and snoop. The user must provide at least one umask for each category. The categories
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are shown in the umask descriptions.
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There is also the special response umask called \fBANY_RESPONSE\fR. When this umask
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is used then it overrides any supplier and snoop umasks. In other words, users can
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specify either \fBANY_RESPONSE\fR \fBOR\fR any combinations of supplier + snoops.
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In case no supplier or snoop is specified, the library defaults to using
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\fBANY_RESPONSE\fR.
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For instance, the following are valid event selections:
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.TP
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.B OFFCORE_RESPONSE_0:DMND_DATA_RD:ANY_RESPONSE
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.TP
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.B OFFCORE_RESPONSE_0:ANY_REQUEST
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.TP
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.B OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY
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.P
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But the following are illegal:
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.TP
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.B OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:ANY_RESPONSE
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.TP
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.B OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY:ANY_RESPONSE
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.SH AUTHORS
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.nf
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Stephane Eranian <eranian@gmail.com>
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.if
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.PP
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