// Copyright(c) 2018-2020, Intel Corporation

//

// Redistribution  and  use  in source  and  binary  forms,  with  or  without

// modification, are permitted provided that the following conditions are met:

//

// * Redistributions of  source code  must retain the  above copyright notice,

//   this list of conditions and the following disclaimer.

// * Redistributions in binary form must reproduce the above copyright notice,

//   this list of conditions and the following disclaimer in the documentation

//   and/or other materials provided with the distribution.

// * Neither the name  of Intel Corporation  nor the names of its contributors

//   may be used to  endorse or promote  products derived  from this  software

//   without specific prior written permission.

//

// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,  BUT NOT LIMITED TO,  THE

// IMPLIED WARRANTIES OF  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

// ARE DISCLAIMED.  IN NO EVENT  SHALL THE COPYRIGHT OWNER  OR CONTRIBUTORS BE

// LIABLE  FOR  ANY  DIRECT,  INDIRECT,  INCIDENTAL,  SPECIAL,  EXEMPLARY,  OR

// CONSEQUENTIAL  DAMAGES  (INCLUDING,  BUT  NOT LIMITED  TO,  PROCUREMENT  OF

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// INTERRUPTION)  HOWEVER CAUSED  AND ON ANY THEORY  OF LIABILITY,  WHETHER IN

// CONTRACT,  STRICT LIABILITY,  OR TORT  (INCLUDING NEGLIGENCE  OR OTHERWISE)

// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,  EVEN IF ADVISED OF THE

// POSSIBILITY OF SUCH DAMAGE.

/**

* \file metrics_utils.c

* \brief fpga metrics utils functions

*/

#ifdef HAVE_CONFIG_H

#include <config.h>

#endif // HAVE_CONFIG_H

#include <string.h>

#include <glob.h>

#include <sys/types.h>

#include <sys/stat.h>

#include <fcntl.h>

#include <dirent.h>

#include <uuid/uuid.h>

#include <dlfcn.h>

#include "common_int.h"

#include "metrics_int.h"

#include "types_int.h"

#include "opae/metrics.h"

#include "metrics/vector.h"

#include "xfpga.h"

#include "metrics/bmc/bmc.h"

#include "metrics/metrics_metadata.h"

#include "mcp_metadata.h"

#include "metrics_max10.h"

fpga_result metric_sysfs_path_is_dir(const char *path)

{

	struct stat astats;

	if (path == NULL) {

		return FPGA_INVALID_PARAM;

	}

	if ((stat(path, &astats)) != 0) {

		return FPGA_NOT_FOUND;

	}

	if (S_ISDIR(astats.st_mode)) {

		return FPGA_OK;

	}

	return FPGA_NOT_FOUND;

}

fpga_result metric_sysfs_path_is_file(const char *path)

{

	struct stat astats;

	if (path == NULL) {

		return FPGA_INVALID_PARAM;

	}

	if ((stat(path, &astats)) != 0) {

		return FPGA_NOT_FOUND;

	}

	if (S_ISREG(astats.st_mode)) {

		return FPGA_OK;

	}

	return FPGA_NOT_FOUND;

}

// Adds Metrics info to vector

fpga_result add_metric_vector(fpga_metric_vector *vector,

				uint64_t metric_num,

				const char *qualifier_name,

				const char *group_name,

				const char *group_sysfs,

				const char *metric_name,

				const char *metric_sysfs,

				const char *metric_units,

				enum fpga_metric_datatype  metric_datatype,

				enum fpga_metric_type	metric_type,

				enum fpga_hw_type	hw_type,

				uint64_t mmio_offset)

{

	fpga_result result                           = FPGA_OK;

	struct _fpga_enum_metric *fpga_enum_metric   = NULL;

	size_t len;

	if (vector == NULL ||

		group_name == NULL ||

		group_sysfs == NULL ||

		metric_name == NULL ||

		metric_sysfs == NULL ||

		qualifier_name == NULL ||

		metric_units == NULL) {

		OPAE_ERR("Invalid Input parameters");

		return FPGA_INVALID_PARAM;

	}

	fpga_enum_metric = (struct _fpga_enum_metric *)malloc(sizeof(struct _fpga_enum_metric));

	if (fpga_enum_metric == NULL) {

		OPAE_ERR("Failed to allocate memory");

		return FPGA_NO_MEMORY;

	}

	len = strnlen(group_name, SYSFS_PATH_MAX - 1);

	memcpy(fpga_enum_metric->group_name, group_name, len);

	fpga_enum_metric->group_name[len] = '\0';

	len = strnlen(group_sysfs, SYSFS_PATH_MAX - 1);

	memcpy(fpga_enum_metric->group_sysfs, group_sysfs, len);

	fpga_enum_metric->group_sysfs[len] = '\0';

	len = strnlen(metric_name, SYSFS_PATH_MAX - 1);

	memcpy(fpga_enum_metric->metric_name, metric_name, len);

	fpga_enum_metric->metric_name[len] = '\0';

	len = strnlen(metric_sysfs, SYSFS_PATH_MAX - 1);

	memcpy(fpga_enum_metric->metric_sysfs, metric_sysfs, len);

	fpga_enum_metric->metric_sysfs[len] = '\0';

	len = strnlen(qualifier_name, SYSFS_PATH_MAX - 1);

	memcpy(fpga_enum_metric->qualifier_name, qualifier_name, len);

	fpga_enum_metric->qualifier_name[len] = '\0';

	len = strnlen(metric_units, SYSFS_PATH_MAX - 1);

	memcpy(fpga_enum_metric->metric_units, metric_units, len);

	fpga_enum_metric->metric_units[len] = '\0';

	fpga_enum_metric->metric_type = metric_type;

	fpga_enum_metric->metric_datatype = metric_datatype;

	fpga_enum_metric->hw_type = hw_type;

	fpga_enum_metric->metric_num = metric_num;

	fpga_enum_metric->mmio_offset = mmio_offset;

	fpga_vector_push(vector, fpga_enum_metric);

	return result;

}

fpga_result get_metric_data_info(const char *group_name,

				const char *metric_name,

				fpga_metric_metadata *metric_data_serach,

				uint64_t size,

				fpga_metric_metadata *metric_data)

{

	fpga_result result       = FPGA_OK;

	uint64_t i               = 0;

	int group_indicator      = 0;

	int metric_indicator     = 0;

	if (group_name == NULL ||

		metric_name == NULL ||

		metric_data_serach == NULL ||

		metric_data == NULL) {

		OPAE_ERR("Invalid Input Paramters");

		return FPGA_INVALID_PARAM;

	}

	for (i = 0; i < size; i++) {

		group_indicator = strcasecmp(metric_data_serach[i].group_name,

					     group_name);

		metric_indicator = strcasecmp(metric_data_serach[i].metric_name,

					      metric_name);

		if (group_indicator == 0 &&

			metric_indicator == 0) {

			*metric_data = (struct fpga_metric_metadata)metric_data_serach[i];

			return result;

		}

	}

	return FPGA_NOT_SUPPORTED;

}

// enumerates thermal metrics info

fpga_result enum_thermalmgmt_metrics(fpga_metric_vector *vector,

					uint64_t *metric_num,

					const char *sysfspath,

					enum fpga_hw_type	hw_type)

{

	fpga_result result                      = FPGA_OK;

	fpga_metric_metadata metric_data;

	size_t i = 0;

	glob_t pglob;

	memset(&metric_data, 0, sizeof(metric_data));

	if (vector == NULL ||

		sysfspath == NULL ||

		metric_num == NULL) {

		OPAE_ERR("Invalid Input parameters");

		return FPGA_INVALID_PARAM;

	}

	int gres = glob(sysfspath, GLOB_NOSORT, NULL, &pglob);

	if (gres) {

		OPAE_ERR("Failed pattern match %s: %s", sysfspath, strerror(errno));

		//TODO refactor to common function

		switch (gres) {

		case GLOB_NOSPACE:

			result = FPGA_NO_MEMORY;

			break;

		case GLOB_NOMATCH:

			result = FPGA_NOT_FOUND;

			break;

		default:

			result = FPGA_EXCEPTION;

		}

		if (pglob.gl_pathv) {

			globfree(&pglob);

		}

		return result;

	}

	for (i = 0; i < pglob.gl_pathc; i++) {

		if (!pglob.gl_pathv) {

			OPAE_ERR("No matching pattern");

			break;

		}

		char *dir_name = strrchr(pglob.gl_pathv[i], '/');

		if (!dir_name)

			continue;

		if (!strcmp((dir_name + 1), REVISION))

			continue;

		result = get_metric_data_info(THERLGMT, (dir_name + 1), mcp_metric_metadata, MCP_MDATA_SIZE, &metric_data);

		if (result != FPGA_OK) {

			OPAE_MSG("Failed to get metric metadata ");

		}

		result = add_metric_vector(vector, *metric_num, THERLGMT, THERLGMT, sysfspath, (dir_name + 1), pglob.gl_pathv[i], metric_data.metric_units,

								FPGA_METRIC_DATATYPE_INT, FPGA_METRIC_TYPE_THERMAL, hw_type, 0);

		if (result != FPGA_OK) {

			OPAE_MSG("Failed to add metrics");

			if (pglob.gl_pathv) {

				globfree(&pglob);

			}

			return result;

		}

		*metric_num = *metric_num + 1;

	}

	if (pglob.gl_pathv) {

		globfree(&pglob);

	}

	return result;

}

// enumerates power metrics info

fpga_result enum_powermgmt_metrics(fpga_metric_vector *vector,

					uint64_t *metric_num,

					const char *sysfspath,

					enum fpga_hw_type hw_type)

{

	fpga_result result                  = FPGA_OK;

	size_t i = 0;

	fpga_metric_metadata metric_data;

	glob_t pglob;

	memset(&metric_data, 0, sizeof(metric_data));

	if (vector == NULL ||

		sysfspath == NULL ||

		metric_num == NULL) {

		OPAE_ERR("Invalid Input parameters");

		return FPGA_INVALID_PARAM;

	}

	int gres = glob(sysfspath, GLOB_NOSORT, NULL, &pglob);

	if (gres) {

		OPAE_ERR("Failed pattern match %s: %s", sysfspath, strerror(errno));

		//TODO refactor to common function

		switch (gres) {

		case GLOB_NOSPACE:

			result = FPGA_NO_MEMORY;

			break;

		case GLOB_NOMATCH:

			result = FPGA_NOT_FOUND;

			break;

		default:

			result = FPGA_EXCEPTION;

		}

		if (pglob.gl_pathv) {

			globfree(&pglob);

		}

		return result;

	}

	for (i = 0; i < pglob.gl_pathc; i++) {

		if (!pglob.gl_pathv) {

			OPAE_ERR("No matching pattern");

			break;

		}

		char *dir_name = strrchr(pglob.gl_pathv[i], '/');

		if (!dir_name)

			continue;

		if (!strcmp((dir_name + 1), REVISION))

			continue;

		result = get_metric_data_info(PWRMGMT, (dir_name + 1), mcp_metric_metadata, MCP_MDATA_SIZE, &metric_data);

		if (result != FPGA_OK) {

			OPAE_MSG("Failed to get metric metadata ");

		}

		result = add_metric_vector(vector, *metric_num, PWRMGMT, PWRMGMT, sysfspath, (dir_name + 1), pglob.gl_pathv[i], metric_data.metric_units,

								FPGA_METRIC_DATATYPE_INT, FPGA_METRIC_TYPE_POWER, hw_type, 0);

		if (result != FPGA_OK) {

			OPAE_MSG("Failed to add metrics");

			if (pglob.gl_pathv) {

				globfree(&pglob);

			}

			return result;

		}

		*metric_num = *metric_num + 1;

	}

	if (pglob.gl_pathv) {

		globfree(&pglob);

	}

	return result;

}

// enumerates performance counters metrics info

fpga_result enum_perf_counter_items(fpga_metric_vector *vector,

				uint64_t *metric_num,

				const char *qualifier_name,

				const char *sysfspath,

				const char *sysfs_name,

				enum fpga_metric_type metric_type,

				enum fpga_hw_type  hw_type)

{

	fpga_result result                  = FPGA_OK;

	DIR *dir                            = NULL;

	struct dirent *dirent               = NULL;

	char sysfs_path[SYSFS_PATH_MAX]     = { 0, };

	char metric_sysfs[SYSFS_PATH_MAX]   = { 0, };

	char qname[SYSFS_PATH_MAX]          = { 0, };

	if (vector == NULL ||

		sysfspath == NULL ||

		sysfs_name == NULL ||

		qualifier_name == NULL ||

		metric_num == NULL) {

		OPAE_ERR("Invalid Input parameters");

		return FPGA_INVALID_PARAM;

	}

	snprintf(sysfs_path, sizeof(sysfs_path),

		 "%s/%s", sysfspath, sysfs_name);

	dir = opendir(sysfs_path);

	if (NULL == dir) {

		OPAE_MSG("can't find dir %s ", strerror(errno));

		return FPGA_NOT_FOUND;

	}

	while ((dirent = readdir(dir)) != NULL) {

		if (!strcmp(dirent->d_name, "."))

			continue;

		if (!strcmp(dirent->d_name, ".."))

			continue;

		if (!strcmp(dirent->d_name, PERF_ENABLE))

			continue;

		if (!strcmp(dirent->d_name, PERF_FREEZE))

			continue;

		if (dirent->d_type == DT_DIR) {

			if (snprintf(qname, sizeof(qname),

				     "%s:%s", qualifier_name, dirent->d_name) < 0) {

				OPAE_ERR("snprintf buffer overflow");

				continue;

			}

			result = enum_perf_counter_items(vector, metric_num, qname, sysfs_path, dirent->d_name, metric_type, hw_type);

			if (result != FPGA_OK) {

				OPAE_MSG("Failed to add metrics");

			}

			continue;

		}

		if (snprintf(metric_sysfs, sizeof(metric_sysfs),

			     "%s/%s", sysfs_path, dirent->d_name) < 0) {

			OPAE_ERR("snprintf buffer overflow");

			closedir(dir);

			return FPGA_EXCEPTION;

		}

		result = add_metric_vector(vector, *metric_num, qualifier_name, "performance", sysfs_path, dirent->d_name,

			metric_sysfs, "", FPGA_METRIC_DATATYPE_INT, metric_type, hw_type, 0);

		if (result != FPGA_OK) {

			OPAE_MSG("Failed to add metrics");

			closedir(dir);

			return result;

		}

		*metric_num = *metric_num + 1;

	}

	closedir(dir);

	return result;

}

// enumerates performance counters metrics info

fpga_result enum_perf_counter_metrics(fpga_metric_vector *vector,

					uint64_t *metric_num,

					const char *sysfspath,

					enum fpga_hw_type  hw_type)

{

	fpga_result result                  = FPGA_OK;

	DIR *dir                            = NULL;

	struct dirent *dirent               = NULL;

	char sysfs_path[SYSFS_PATH_MAX]     = { 0, };

	char qualifier_name[SYSFS_PATH_MAX] = { 0, };

	glob_t pglob;

	size_t len;

	if (vector == NULL ||

		sysfspath == NULL ||

		metric_num == NULL) {

		OPAE_ERR("Invalid Input parameters");

		return FPGA_INVALID_PARAM;

	}

	int gres = glob(sysfspath, GLOB_NOSORT, NULL, &pglob);

	if (gres) {

		OPAE_ERR("Failed pattern match %s: %s", sysfspath, strerror(errno));

		if (pglob.gl_pathv) {

			globfree(&pglob);

		}

		return FPGA_NOT_FOUND;

	}

	len = strnlen(pglob.gl_pathv[0], sizeof(sysfs_path) - 1);

	memcpy(sysfs_path, pglob.gl_pathv[0], len);

	sysfs_path[len] = '\0';

	globfree(&pglob);

	dir = opendir(sysfs_path);

	if (NULL == dir) {

		OPAE_MSG("can't find dirt %s ", strerror(errno));

		return FPGA_NOT_FOUND;

	}

	while ((dirent = readdir(dir)) != NULL) {

		if (!strcmp(dirent->d_name, "."))

			continue;

		if (!strcmp(dirent->d_name, ".."))

			continue;

		if (!strcmp(dirent->d_name, REVISION))

			continue;

		if (strcmp(dirent->d_name, PERF_CACHE) == 0) {

			snprintf(qualifier_name, sizeof(qualifier_name),

				 "%s:%s", PERFORMANCE, PERF_CACHE);

			result = enum_perf_counter_items(vector,

					metric_num, qualifier_name,

					sysfs_path, dirent->d_name,

					FPGA_METRIC_TYPE_PERFORMANCE_CTR, hw_type);

			if (result != FPGA_OK) {

				OPAE_MSG("Failed to add metrics");

			}

		}

		if (strcmp(dirent->d_name, PERF_FABRIC) == 0) {

			snprintf(qualifier_name, sizeof(qualifier_name),

				 "%s:%s", PERFORMANCE, PERF_FABRIC);

			result = enum_perf_counter_items(vector, metric_num,

					qualifier_name, sysfs_path,

					dirent->d_name, FPGA_METRIC_TYPE_PERFORMANCE_CTR, hw_type);

			if (result != FPGA_OK) {

				OPAE_MSG("Failed to add metrics");

			}

		}

		if (strcmp(dirent->d_name, PERF_IOMMU) == 0) {

			snprintf(qualifier_name, sizeof(qualifier_name),

				 "%s:%s", PERFORMANCE, PERF_IOMMU);

			result = enum_perf_counter_items(vector, metric_num,

					qualifier_name, sysfs_path, dirent->d_name,

					FPGA_METRIC_TYPE_PERFORMANCE_CTR, hw_type);

			if (result != FPGA_OK) {

				OPAE_MSG("Failed to add metrics");

			}

		}

	}

	closedir(dir);

	return result;

}

fpga_result xfpga_bmcLoadSDRs(struct _fpga_handle *_handle,

		bmc_sdr_handle *records,

		uint32_t *num_sensors)

{

	fpga_result result = FPGA_NOT_FOUND;

	fpga_result(*bmcLoadSDRs)(fpga_token token, bmc_sdr_handle *records,

		uint32_t *num_sensors);

	if (_handle->bmc_handle != NULL) {

		bmcLoadSDRs = dlsym(_handle->bmc_handle, "bmcLoadSDRs");

		if (bmcLoadSDRs)

			result = bmcLoadSDRs(_handle->token, records, num_sensors);

		else

			result = FPGA_EXCEPTION;

	}

	return result;

}

fpga_result xfpga_bmcDestroySDRs(struct _fpga_handle *_handle,

		bmc_sdr_handle *records)

{

	fpga_result result = FPGA_NOT_FOUND;

	fpga_result(*bmcDestroySDRs)(bmc_sdr_handle *records);

	if (_handle->bmc_handle != NULL) {

		bmcDestroySDRs = dlsym(_handle->bmc_handle, "bmcDestroySDRs");

		if (bmcDestroySDRs)

			result = bmcDestroySDRs(records);

		else

			result = FPGA_EXCEPTION;

	}

	return result;

}

fpga_result xfpga_bmcReadSensorValues(struct _fpga_handle *_handle,

		bmc_sdr_handle records,

		bmc_values_handle *values,

		uint32_t *num_values)

{

	fpga_result result = FPGA_NOT_FOUND;

	fpga_result(*bmcReadSensorValues)(bmc_sdr_handle records, bmc_values_handle *values, uint32_t *num_values);

	if (_handle->bmc_handle != NULL) {

		bmcReadSensorValues = dlsym(_handle->bmc_handle, "bmcReadSensorValues");

		if (bmcReadSensorValues)

			result = bmcReadSensorValues(records, values, num_values);

		else

			result = FPGA_EXCEPTION;

	}

	return result;

}

fpga_result xfpga_bmcDestroySensorValues(struct _fpga_handle *_handle,

		bmc_values_handle *values)

{

	fpga_result result = FPGA_NOT_FOUND;

	fpga_result(*bmcDestroySensorValues)(bmc_values_handle *values);

	if (_handle->bmc_handle != NULL) {

		bmcDestroySensorValues = dlsym(_handle->bmc_handle, "bmcDestroySensorValues");

		if (bmcDestroySensorValues)

			result = bmcDestroySensorValues(values);

		else

			result = FPGA_EXCEPTION;

	}

	return result;

}

fpga_result xfpga_bmcGetSensorReading(struct _fpga_handle *_handle,

		bmc_values_handle values,

		uint32_t sensor_number,

		uint32_t *is_valid,

		double *value)

{

	fpga_result result = FPGA_NOT_FOUND;

	fpga_result(*bmcGetSensorReading)(bmc_values_handle values,

		uint32_t sensor_number, uint32_t *is_valid,

		double *value);

	if (_handle->bmc_handle != NULL) {

		bmcGetSensorReading = dlsym(_handle->bmc_handle, "bmcGetSensorReading");

		if (bmcGetSensorReading)

			result = bmcGetSensorReading(values, sensor_number, is_valid, value);

		else

			result = FPGA_EXCEPTION;

	}

	return result;

}

fpga_result xfpga_bmcGetSDRDetails(struct _fpga_handle *_handle,

		bmc_values_handle values,

		uint32_t sensor_number,

		sdr_details *details)

{

	fpga_result result = FPGA_NOT_FOUND;

	fpga_result(*bmcGetSDRDetails)(bmc_values_handle values, uint32_t sensor_number,

		sdr_details *details);

	if (_handle->bmc_handle != NULL) {

		bmcGetSDRDetails = dlsym(_handle->bmc_handle, "bmcGetSDRDetails");

		if (bmcGetSDRDetails)

			result = bmcGetSDRDetails(values, sensor_number, details);

		else

			result = FPGA_EXCEPTION;

	}

	return result;

}

// enumerates bmc power & theraml metrics info

fpga_result  enum_bmc_metrics_info(struct _fpga_handle *_handle,

				fpga_metric_vector *vector,

				uint64_t *metric_num,

				enum fpga_hw_type  hw_type)

{

	fpga_result result                      = FPGA_OK;

	uint32_t x                              = 0;

	uint32_t num_sensors                    = 0;

	uint32_t num_values                     = 0;

	enum fpga_metric_type metric_type       = FPGA_METRIC_TYPE_POWER;

	char group_name[SYSFS_PATH_MAX]         = { 0, };

	char qualifier_name[SYSFS_PATH_MAX]     = { 0, };

	char units[SYSFS_PATH_MAX]              = { 0, };

	sdr_details details;

	bmc_sdr_handle records;

	bmc_values_handle values;

	size_t len;

	if (vector == NULL ||

		metric_num == NULL) {

		OPAE_ERR("Invalid input");

		return result;

	}

	result = xfpga_bmcLoadSDRs(_handle, &records, &num_sensors);

	if (result != FPGA_OK) {

		OPAE_ERR("Failed to load BMC SDR.");

		return result;

	}

	result = xfpga_bmcReadSensorValues(_handle, records, &values, &num_values);

	if (result != FPGA_OK) {

		OPAE_ERR("Failed to read BMC sensor values.");

		return result;

	}

	for (x = 0; x < num_sensors; x++) {

		result = xfpga_bmcGetSDRDetails(_handle, values, x, &details);

		if (details.sensor_type == BMC_THERMAL) {

			metric_type = FPGA_METRIC_TYPE_THERMAL;

			len = strnlen(THERLGMT, sizeof(group_name) - 1);

			memcpy(group_name, THERLGMT, len);

			group_name[len] = '\0';

			len = strnlen(TEMP, sizeof(units) - 1);

			memcpy(units, TEMP, len);

			units[len] = '\0';

			snprintf(qualifier_name, sizeof(qualifier_name),

				 "%s:%s", THERLGMT, details.name);

		} else if (details.sensor_type == BMC_POWER) {

			metric_type = FPGA_METRIC_TYPE_POWER;

			len = strnlen(PWRMGMT, sizeof(group_name) - 1);

			memcpy(group_name, PWRMGMT, len);

			group_name[len] = '\0';

			snprintf(qualifier_name, sizeof(qualifier_name),

				 "%s:%s", PWRMGMT, details.name);

			snprintf(units, sizeof(units), "%ls", details.units);

		} else {

				continue;

		}

		result = add_metric_vector(vector, *metric_num,

				qualifier_name, group_name, "",

				details.name, "", units, FPGA_METRIC_DATATYPE_DOUBLE,

				metric_type, hw_type, 0);

		if (result != FPGA_OK) {

			OPAE_MSG("Failed to add metrics");

			return result;

		}

		*metric_num = *metric_num + 1;

	}

	result = xfpga_bmcDestroySensorValues(_handle, &values);

	if (result != FPGA_OK) {

		OPAE_MSG("Failed to Destroy Sensor value.");

	}

	result = xfpga_bmcDestroySDRs(_handle, &records);

	if (result != FPGA_OK) {

		OPAE_ERR("Failed to Destroy SDR.");

		return result;

	}

	return result;

}

// frees metrics info vector

fpga_result free_fpga_enum_metrics_vector(struct _fpga_handle *_handle)

{

	fpga_result result        = FPGA_OK;

	uint64_t i                = 0;

	uint64_t num_enun_metrics = 0;

	if (_handle == NULL) {

		OPAE_ERR("Invalid handle ");

		return FPGA_INVALID_PARAM;

	}

	if (_handle->magic != FPGA_HANDLE_MAGIC) {

		OPAE_MSG("Invalid handle");

		return FPGA_INVALID_PARAM;

	}

	result = fpga_vector_total(&(_handle->fpga_enum_metric_vector), &num_enun_metrics);

	if (result != FPGA_OK) {

		OPAE_MSG("Failed to get metric total");

		return FPGA_INVALID_PARAM;

	}

	for (i = 0; i < num_enun_metrics; i++) {

		fpga_vector_delete(&(_handle->fpga_enum_metric_vector), i);

	}

	fpga_vector_free(&(_handle->fpga_enum_metric_vector));

	if (_handle->bmc_handle) {

		dlclose(_handle->bmc_handle);

		_handle->bmc_handle = NULL;

	}

	clear_cached_values(_handle);

	_handle->metric_enum_status = false;

	return result;

}

// retrives fpga object type

fpga_result get_fpga_object_type(fpga_handle handle,

		fpga_objtype *objtype)

{

	fpga_result result     = FPGA_OK;

	fpga_result resval     = FPGA_OK;

	fpga_properties prop;

	result = xfpga_fpgaGetPropertiesFromHandle(handle, &prop);

	if (result != FPGA_OK) {

		OPAE_ERR("Failed to get properties");

		return result;

	}

	result = fpgaPropertiesGetObjectType(prop, objtype);

	if (result != FPGA_OK) {

		OPAE_ERR("Failed to object type.");

	}

	resval = (result != FPGA_OK) ? result : resval;

	result = fpgaDestroyProperties(&prop);

	if (result != FPGA_OK) {

		OPAE_ERR("Failed to destroy properties");

	}

	resval = (result != FPGA_OK) ? result : resval;

	return resval;

}

void *metrics_load_bmc_lib(void)

{

	char plugin_path[PATH_MAX] = { 0, };

	const char *search_paths[] = { OPAE_MODULE_SEARCH_PATHS };

	unsigned i;

	void *dl_handle;

	for (i = 0 ;

		i < sizeof(search_paths) / sizeof(search_paths[0]) ;

		++i) {

		snprintf(plugin_path, sizeof(plugin_path),

			 "%s%s", search_paths[i], BMC_LIB);

		dl_handle = dlopen(plugin_path, RTLD_LAZY | RTLD_LOCAL);

		if (dl_handle)

			return dl_handle;

	}

	return NULL;

}

// enumerates FME & AFU metrics info

fpga_result enum_fpga_metrics(fpga_handle handle)

{

	fpga_result result              = FPGA_OK;

	struct _fpga_token *_token      = NULL;

	enum fpga_hw_type hw_type	= FPGA_HW_UNKNOWN;

	uint64_t mmio_offset            = 0;

	uint64_t metric_num             = 0;

	char metrics_path[SYSFS_PATH_MAX] = { 0 };

	fpga_objtype objtype;

	struct _fpga_handle *_handle = (struct _fpga_handle *)handle;

	if (_handle == NULL) {

		OPAE_ERR("Invalid handle ");

		return FPGA_INVALID_PARAM;

	}

	if (_handle->metric_enum_status)

		return FPGA_OK;

	_token = (struct _fpga_token *)_handle->token;

	if (_token == NULL) {

		OPAE_ERR("Invalid token within handle");