// Copyright(c) 2018, Intel Corporation

//

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// modification, are permitted provided that the following conditions are met:

//

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//   this list of conditions and the following disclaimer.

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//   may be used to  endorse or promote  products derived  from this  software

//   without specific prior written permission.

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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

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/*

 * @file bmcdata.h

 *

 * @brief

 */

#ifndef BMCDATA_H

#define BMCDATA_H

#include <opae/fpga.h>

#include <wchar.h>

#include "bmcinfo.h"

typedef enum {

	CHIP_RESET_CAUSE_POR = 0x01,

	CHIP_RESET_CAUSE_EXTRST = 0x02,

	CHIP_RESET_CAUSE_BOD_IO = 0x04,

	CHIP_RESET_CAUSE_WDT = 0x08,

	CHIP_RESET_CAUSE_OCD = 0x10,

	CHIP_RESET_CAUSE_SOFT = 0x20,

	CHIP_RESET_CAUSE_SPIKE = 0x40,

} ResetCauses;

#ifdef __cplusplus

extern "C" {

#endif

void calc_params(sdr_body *body, Values *val);

double getvalue(Values *val, uint8_t raw);

fpga_result read_sysfs_file(fpga_token token, const char *file,

		   void **buf, uint32_t *tot_bytes_ret);

#ifdef __cplusplus

}

#endif

#endif /* !BMCDATA_H */