Blame IbPrint/stl_mad.c

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/* BEGIN_ICS_COPYRIGHT7 ****************************************
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Copyright (c) 2015-2017, Intel Corporation
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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    * Redistributions of source code must retain the above copyright notice,
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      this list of conditions and the following disclaimer.
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    * Redistributions in binary form must reproduce the above copyright
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      notice, this list of conditions and the following disclaimer in the
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      documentation and/or other materials provided with the distribution.
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    * Neither the name of Intel Corporation nor the names of its contributors
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      may be used to endorse or promote products derived from this software
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      without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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** END_ICS_COPYRIGHT7   ****************************************/
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#include "ibprint.h"
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#include "stl_print.h"
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void PrintStlSmpHeader(PrintDest_t *dest, int indent, const STL_SMP *smp)
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{
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	PrintMadHeader(dest, indent, &smp->common);
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	PrintFunc(dest, "%*sM_KEY: 0x%016"PRIx64"\n", indent, "", smp->M_Key);
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	if (smp->common.MgmtClass == MCLASS_SM_DIRECTED_ROUTE) {
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		uint16 offset;
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		uint32 i;
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		char buf[128];
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		PrintFunc(dest, "%*sDR: D: %u Ptr: %3u Cnt: %3u DrSLID: 0x%08x DrDLID: 0x%08x\n",
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				indent, "", smp->common.u.DR.s.D,
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			   	smp->common.u.DR.HopPointer, smp->common.u.DR.HopCount,
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				smp->SmpExt.DirectedRoute.DrSLID,
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				smp->SmpExt.DirectedRoute.DrDLID);
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		offset = sprintf(buf, "InitPath:");
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		// entry 0 is not used
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		for (i=1; i<= smp->common.u.DR.HopCount; i++) {
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			if ((i-1)%16 == 0 && i>1) {
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				PrintFunc(dest, "%*s%s\n", indent, "", buf);
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				offset=sprintf(buf, "         ");
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			}
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			offset += sprintf(&buf[offset], " %3u", smp->SmpExt.DirectedRoute.InitPath[i]);
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		}
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		PrintFunc(dest, "%*s%s\n", indent, "", buf);
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		if (smp->common.u.DR.s.D) {
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			offset = sprintf(buf, "RetPath: ");
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			// entry 0 is not used
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			for (i=1; i<= smp->common.u.DR.HopCount; i++) {
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				if ((i-1)%16 == 0 && i>1) {
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					PrintFunc(dest, "%*s%s\n", indent, "", buf);
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					offset=sprintf(buf, "         ");
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				}
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				offset += sprintf(&buf[offset], " %3u", smp->SmpExt.DirectedRoute.RetPath[i]);
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			}
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			PrintFunc(dest, "%*s%s\n", indent, "", buf);
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		}
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	}
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}
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void PrintStlAggregateMember(PrintDest_t *dest, int indent, const STL_AGGREGATE *aggr)
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{
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	PrintFunc(dest, "%*sAttrID: 0x%04x\n", indent, "", aggr->AttributeID);
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	PrintFunc(dest, "%*sError: 0x%02x, RequestLength: 0x%02x\n", indent+2, "", 
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		aggr->Result.s.Error, aggr->Result.s.RequestLength);
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	PrintFunc(dest, "%*sModifier: 0x%02x\n", indent+2, "", aggr->AttributeModifier);
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}
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void PrintStlClassPortInfo(PrintDest_t *dest, int indent, const STL_CLASS_PORT_INFO *pClassPortInfo, uint8 MgmtClass)
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{
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	char tbuf[8];
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	char cbuf[80];
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	char c2buf[80];
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	PrintFunc(dest, "%*sBaseVersion: %d ClassVersion: %d\n",
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				indent, "", pClassPortInfo->BaseVersion,
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				pClassPortInfo->ClassVersion);
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	FormatTimeoutMult(tbuf, pClassPortInfo->u1.s.RespTimeValue);
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	switch (MgmtClass) {
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	case MCLASS_SUBN_ADM: /* SA */
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		StlSaClassPortInfoCapMask(cbuf, pClassPortInfo->CapMask);
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		StlSaClassPortInfoCapMask2(c2buf, pClassPortInfo->u1.s.CapMask2);
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		break;
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	case MCLASS_PERF: /* PM */
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		StlPmClassPortInfoCapMask(cbuf, pClassPortInfo->CapMask);
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		StlPmClassPortInfoCapMask2(c2buf, pClassPortInfo->u1.s.CapMask2);
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		break;
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	case MCLASS_VFI_PM: /* PA */
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		StlPaClassPortInfoCapMask(cbuf, pClassPortInfo->CapMask);
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		StlPaClassPortInfoCapMask2(c2buf, pClassPortInfo->u1.s.CapMask2);
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		break;
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	default:
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		StlCommonClassPortInfoCapMask(cbuf, pClassPortInfo->CapMask);
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		StlCommonClassPortInfoCapMask2(c2buf, pClassPortInfo->u1.s.CapMask2);
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		break;
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	}
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	PrintFunc(dest, "%*sRespTime: %s Capability: 0x%04x: %s\n",
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				indent, "", tbuf,
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				pClassPortInfo->CapMask, cbuf);
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	PrintFunc(dest, "%*sCapability2: 0x%07x: %s\n",
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				indent, "",
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				pClassPortInfo->u1.s.CapMask2, c2buf);
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	PrintFunc(dest, "%*sRedirect: LID: 0x%.*x GID: 0x%016"PRIx64":0x%016"PRIx64"\n",
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				indent, "",(pClassPortInfo->RedirectLID <= IB_MAX_UCAST_LID ? 4 : 8),
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				pClassPortInfo->RedirectLID,
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				pClassPortInfo->RedirectGID.AsReg64s.H,
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				pClassPortInfo->RedirectGID.AsReg64s.L);
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	PrintFunc(dest, "%*s          QP: 0x%06x QKey: 0x%08x PKey: 0x%04x SL: %2u\n",
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				indent, "",
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				pClassPortInfo->u3.s.RedirectQP,
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				pClassPortInfo->Redirect_Q_Key,
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				pClassPortInfo->Redirect_P_Key,
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				pClassPortInfo->u3.s.RedirectSL);
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	PrintFunc(dest, "%*s          FlowLabel: 0x%05x TClass: 0x%02x\n",
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				indent, "",
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				pClassPortInfo->u2.s.RedirectFlowLabel,
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				pClassPortInfo->u2.s.RedirectTClass);
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	PrintFunc(dest, "%*sTrap: LID: 0x%.*x GID: 0x%016"PRIx64":0x%016"PRIx64"\n",
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				indent, "",(pClassPortInfo->TrapLID <= IB_MAX_UCAST_LID ? 4:8),
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				pClassPortInfo->TrapLID,
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				pClassPortInfo->TrapGID.AsReg64s.H,
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				pClassPortInfo->TrapGID.AsReg64s.L);
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	PrintFunc(dest, "%*s      QP: 0x%06x QKey: 0x%08x PKey: 0x%04x SL: %2u\n",
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				indent, "",
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				pClassPortInfo->u5.s.TrapQP,
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				pClassPortInfo->Trap_Q_Key,
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				pClassPortInfo->Trap_P_Key,
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				pClassPortInfo->u6.s.TrapSL);
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	PrintFunc(dest, "%*s      FlowLabel: 0x%05x HopLimit: 0x%02x TClass: 0x%02x\n",
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				indent, "",
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				pClassPortInfo->u4.s.TrapFlowLabel,
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				pClassPortInfo->u5.s.TrapHopLimit,
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				pClassPortInfo->u4.s.TrapTClass);
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}
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