From f840d534fdedc91a22dcd9f057608d7a88f61bbc Mon Sep 17 00:00:00 2001 From: Packit Service Date: Feb 24 2021 15:41:14 +0000 Subject: Add sources defined in the spec file --- diff --git a/SPECS/06-55-04 b/SPECS/06-55-04 index d78784a..754d081 100644 Binary files a/SPECS/06-55-04 and b/SPECS/06-55-04 differ diff --git a/SPECS/06-55-04_readme b/SPECS/06-55-04_readme index 822e7a0..cdec2c2 100644 --- a/SPECS/06-55-04_readme +++ b/SPECS/06-55-04_readme @@ -10,12 +10,7 @@ Since revision 0x2006906 (included with the microcode-20200609 release) it is reported that the issue is no longer present, so the newer microcode revision is enabled by default now (but can be disabled explicitly; see below). -Revision 0x2006a08 (included since the microcode-20201110 release) exhibits -a different issue on some systems, so it is controlled by 06-55-0x-ipu-2020.2 -caveat; please refer to [2] for details. - [1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/21 -[2] /usr/share/doc/microcode_ctl/caveats/06-55-0x-ipu-2020.2_readme For the reference, SHA1 checksums of 06-55-04 microcode files containing microcode revisions in question are listed below: @@ -23,6 +18,7 @@ microcode revisions in question are listed below: * 06-55-04, revision 0x2000065: f27f12b9d53f492c297afd856cdbc596786fad23 * 06-55-04, revision 0x2006906: 5f18f985f6d5ad369b5f6549b7f3ee55acaef967 * 06-55-04, revision 0x2006a08: 4059fb1f60370297454177f63cd7cc20b3fa1212 + * 06-55-04, revision 0x2006a0a: 7ec27025329c82de9553c14a78733ad1013e5462 Please contact your system vendor for a BIOS/firmware update that contains the latest microcode version. For the information regarding microcode versions diff --git a/SPECS/06-8c-01 b/SPECS/06-8c-01 new file mode 100644 index 0000000..ae60673 Binary files /dev/null and b/SPECS/06-8c-01 differ diff --git a/SPECS/README.caveats b/SPECS/README.caveats index b177eed..d18c2a5 100644 --- a/SPECS/README.caveats +++ b/SPECS/README.caveats @@ -560,11 +560,6 @@ to enable ability to disable it in case such a need arises. (See the sections "check_caveats script" and "reload_microcode script" for details regarding caveats mechanism operation.) -Revision 0x2006a08 (included since the microcode-20201110 release) exhibits -a different issue on some systems, so it is controlled by 06-55-0x-ipu-2020.2 -caveat; please refer to the "Intel Skylake-SP and Cascade Lake-SP -microcode-20201110 caveats" section for details. - [1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/21 Caveat name: intel-06-55-04 @@ -576,28 +571,6 @@ previously published microcode revision 0x2000064 is still available as a fallback as part of "intel" caveat. -Intel Skylake-SP and Cascade Lake-SP microcode-20201110 caveats ---------------------------------------------------------------- -Latest microcode updates for Intel Skylake/Cascade Lake Scalable Platform CPUs -(family 6, model 85, steppings 4, 6, and 7; CPUID 0x50654/0x50656/0x50657) -may cause system instability on some systems (there were reports for HPE -Superdome Flex and Supermicro systems[1]) with the resivions that come -with microcode-20201110 release, so the previously released microcode -(with revisions 0x2006906, 0x4001f01, and 0x5002f01, respectively) -from microcode-20200609 release are used by default instead for the OS-driven -microcode update. - -[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/45 - -Caveat name: intel-06-55-0x-ipu-2020.2 - -Affected microcode: intel-ucode/06-55-04, intel-ucode/06-55-06, - intel-ucode/06-55-07 - -Mitigation: previously published microcode files (revision 0x2006906 for 06-55-04, - 0x4002f01 for 06-55-06, 0x5002f01 for 06-55-07) are used by default. - - Intel Skylake-U/Y/H/S/Xeon E3 v5 caveats ---------------------------------------- Some Intel Skylake CPU models (SKL-U/Y, family 6, model 78, stepping 3; diff --git a/SPECS/microcode-20210216.tar.gz b/SPECS/microcode-20210216.tar.gz new file mode 100644 index 0000000..c28360d Binary files /dev/null and b/SPECS/microcode-20210216.tar.gz differ