Intel Processor Microcode Package for Linux

CPU microcode is a mechanism to correct certain errata in existing systems.

The normal preferred method to apply microcode updates is using the system

BIOS, but for a subset of Intel's processors this can be done at runtime

using the operating system. This package contains those processors that

support OS loading of microcode updates.

The target user for this package are OS vendors such as Linux distributions

for inclusion in their OS releases. Intel recommends getting the microcode

using the OS vendor update mechanism. Expert users can of course update their

microcode directly outside the OS vendor mechanism. This method is complex and

thus could be error prone.

Microcode is best loaded from the BIOS. Certain microcode must only be applied

from the BIOS. Such processor microcode updates are never packaged in this

package since they are not appropriate for OS distribution. An OEM may receive

microcode packages that might be a superset of what is contained in this

package.

OS vendors may choose to also update microcode that kernel can consume for early

loading. For e.g. Linux can update processor microcode very early in the kernel

boot sequence. In situations when the BIOS update isn't available, early loading

is the next best alternative to updating processor microcode. Microcode states

are reset on a power reset, hence its required to be updated everytime during

boot process.

Loading microcode using the initrd method is recommended so that the microcode

is loaded at the earliest time for best coverage. Systems that cannot tolerate

downtime may use the late reload method to update a running system without a

reboot.

== About Processor Signature, Family, Model, Stepping and Platform ID ==

Processor signature is a number identifying the model and version of a

Intel processor. It can be obtained using the CPUID instruction, and can

also be obtained via the command lscpu or from the content of /proc/cpuinfo.

It's usually presented as 3 fields: Family, Model and Stepping

(In the table of updates below, they are shorten as F, MO and S).

The width of Family/Model/Stepping is 12/8/4bit, but when arranged in the

32bit processor signature raw data is like 0FFM0FMS, hexadecimal.

e.g. if a processor signature is 0x000906eb, it means

Family=0x006, Model=0x9e and Stepping=0xb

A processor product can be implemented for multiple types of platforms,

So in MSR(17H), Intel processors have a 3bit Platform ID field,

that can specify a platform type from at most 8 types.

A microcode file for a specified processor model can support multiple

platforms, so the Platform ID of a microcode (shorten as PI in the table)

is a 8bit mask, each set bit indicates a platform type that it supports.

One can find the platform ID on Linux using rdmsr from msr-tools.

== Microcode update instructions ==

-- intel-ucode/ --

intel-ucode directory contains binary microcode files named in

family-model-stepping pattern. The file is supported in most modern Linux

distributions. It's generally located in the /lib/firmware directory,

and can be updated through the microcode reload interface.

To update early loading initrd, consult your distribution on how to package

microcode files for early loading. Some distros use update-initramfs or dracut.

As recommended above, please use the OS vendors are recommended method to ensure

microcode file is updated for early loading before attempting the late-load

procedure below.

To update the intel-ucode package to the system, one need:

1. Ensure the existence of /sys/devices/system/cpu/microcode/reload

2. Copy intel-ucode directory to /lib/firmware, overwrite the files in

/lib/firmware/intel-ucode/

3. Write the reload interface to 1 to reload the microcode files, e.g.

  echo 1 > /sys/devices/system/cpu/microcode/reload

If you are using the OS vendor method to update microcode, the above steps may

have been done automatically during the update process.

-- intel-ucode-with-caveats/ --

This directory holds microcode that might need special handling.

BDX-ML microcode is provided in directory, because it need special commits in

the Linux kernel, otherwise, updating it might result in unexpected system

behavior. 

OS vendors must ensure that the late loader patches (provided in

linux-kernel-patches\) are included in the distribution before packaging the

BDX-ML microcode for late-loading.

== 20200609 Release ==

-- Updates upon 20200520 release --

Processor             Identifier     Version       Products

Model        Stepping F-MO-S/PI      Old->New

---- new platforms ----------------------------------------

---- updated platforms ------------------------------------

HSW          C0       6-3c-3/32 00000027->00000028 Core Gen4

BDW-U/Y      E0/F0    6-3d-4/c0 0000002e->0000002f Core Gen5

HSW-U        C0/D0    6-45-1/72 00000025->00000026 Core Gen4

HSW-H        C0       6-46-1/32 0000001b->0000001c Core Gen4

BDW-H/E3     E0/G0    6-47-1/22 00000021->00000022 Core Gen5

SKL-U/Y      D0       6-4e-3/c0 000000d6->000000dc Core Gen6 Mobile

SKL-U23e     K1       6-4e-3/c0 000000d6->000000dc Core Gen6 Mobile

SKX-SP       B1       6-55-3/97 01000151->01000157 Xeon Scalable

SKX-SP       H0/M0/U0 6-55-4/b7 02000065->02006906 Xeon Scalable

SKX-D        M1       6-55-4/b7 02000065->02006906 Xeon D-21xx

CLX-SP       B0       6-55-6/bf 0400002c->04002f01 Xeon Scalable Gen2

CLX-SP       B1       6-55-7/bf 0500002c->05002f01 Xeon Scalable Gen2

SKL-H/S      R0/N0    6-5e-3/36 000000d6->000000dc Core Gen6; Xeon E3 v5

AML-Y22      H0       6-8e-9/10 000000ca->000000d6 Core Gen8 Mobile

KBL-U/Y      H0       6-8e-9/c0 000000ca->000000d6 Core Gen7 Mobile

CFL-U43e     D0       6-8e-a/c0 000000ca->000000d6 Core Gen8 Mobile

WHL-U        W0       6-8e-b/d0 000000ca->000000d6 Core Gen8 Mobile

AML-Y42      V0       6-8e-c/94 000000ca->000000d6 Core Gen10 Mobile

CML-Y42      V0       6-8e-c/94 000000ca->000000d6 Core Gen10 Mobile

WHL-U        V0       6-8e-c/94 000000ca->000000d6 Core Gen8 Mobile

KBL-G/H/S/E3 B0       6-9e-9/2a 000000ca->000000d6 Core Gen7; Xeon E3 v6

CFL-H/S/E3   U0       6-9e-a/22 000000ca->000000d6 Core Gen8 Desktop, Mobile, Xeon E

CFL-S        B0       6-9e-b/02 000000ca->000000d6 Core Gen8

CFL-H/S      P0       6-9e-c/22 000000ca->000000d6 Core Gen9

CFL-H        R0       6-9e-d/22 000000ca->000000d6 Core Gen9 Mobile

---- removed platforms ------------------------------------