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; Copyright (c) 2014-2017, Intel Corporation
;
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;
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; Test CYC-based TSC estimation.
;
; Variant: CBR-based calibration,
;          CYC between TSC and TMA
;
; opt:ptdump --time --time-delta
; opt:ptdump --nom-freq 1 --mtc-freq 8 --cpuid-0x15.eax 1 --cpuid-0x15.ebx 4

org 0x100000
bits 64

; @pt p1: psb()
; @pt p2: cbr(0x2)
; @pt p3: psbend()

; @pt p4: tsc(0xa0000)
; @pt p5: cyc(0x6)
; @pt p6: tma(0x102, 0x8)
; @pt p7: cyc(0x8)
; @pt p8: cyc(0x4)


; @pt .exp(ptdump)
;%0p1   psb
;%0p2   cbr 2
;%0p3   psbend
;%0p4   tsc a0000       tsc +a0000
;%0p5   cyc 6           tsc +3
;%0p6   tma 102, 8      tsc +0
;%0p7   cyc 8           tsc +4
;%0p8   cyc 4           tsc +2