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; Copyright (c) 2014-2017, Intel Corporation
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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;
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; * Redistributions of source code must retain the above copyright notice,
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; this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright notice,
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; this list of conditions and the following disclaimer in the documentation
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; and/or other materials provided with the distribution.
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; * Neither the name of Intel Corporation nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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; POSSIBILITY OF SUCH DAMAGE.
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; Test MTC and CYC-based TSC estimation.
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;
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; Variant: MTC-based calibration
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; no CYC between MTC
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;
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; opt:ptdump --time --time-delta
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; opt:ptdump --mtc-freq 4 --cpuid-0x15.eax 1 --cpuid-0x15.ebx 4
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org 0x100000
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bits 64
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; @pt p1: psb()
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; @pt p2: psbend()
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; @pt p3: tsc(0xa0000)
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; @pt p4: tma(0x18, 0x8)
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; @pt p5: mtc(0x2)
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; @pt p6: mtc(0x3)
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; @pt p7: cyc(0x100)
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; @pt p8: mtc(0x4)
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; @pt p9: cyc(0x80)
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; @pt p10: mtc(0x5)
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; @pt .exp(ptdump)
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;%0p1 psb
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;%0p2 psbend
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;%0p3 tsc a0000 tsc +a0000
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;%0p4 tma 18, 8 tsc +0
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;%0p5 mtc 2 tsc +18
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;%0p6 mtc 3 tsc +40
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;[%p7: calibration error: no timing information]
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;[%p7: error updating time: no calibration]
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;%0p7 cyc 100 tsc +0
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;%0p8 mtc 4 tsc +40
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;%0p9 cyc 80 tsc +40
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;%0p10 mtc 5 tsc +0
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