From 8858d6bccea33e552b98b925b56741af746ad6ab Mon Sep 17 00:00:00 2001 From: Packit Service Date: Dec 08 2020 11:32:58 +0000 Subject: Apply patch glibc-rh1783303-14.patch patch_name: glibc-rh1783303-14.patch present_in_specfile: true location_in_specfile: 329 --- diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index 86ae7fd..c3f541c 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -149,7 +149,12 @@ typedef union static inline int __fesetround_inline (int round) { - if ((unsigned int) round < 2) +#ifdef _ARCH_PWR9 + __fe_mffscrn (round); +#else + if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00)) + __fe_mffscrn (round); + else if ((unsigned int) round < 2) { asm volatile ("mtfsb0 30"); if ((unsigned int) round == 0) @@ -165,7 +170,7 @@ __fesetround_inline (int round) else asm volatile ("mtfsb1 31"); } - +#endif return 0; } @@ -174,7 +179,14 @@ __fesetround_inline (int round) static inline void __fesetround_inline_nocheck (const int round) { - asm volatile ("mtfsfi 7,%0" : : "i" (round)); +#ifdef _ARCH_PWR9 + __fe_mffscrn (round); +#else + if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00)) + __fe_mffscrn (round); + else + asm volatile ("mtfsfi 7,%0" : : "i" (round)); +#endif } #define FPSCR_MASK(bit) (1 << (31 - (bit)))