Blame sysdeps/x86_64/fpu/feenablxcpt.c

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/* Enable floating-point exceptions.
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   Copyright (C) 2001-2018 Free Software Foundation, Inc.
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   This file is part of the GNU C Library.
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   Contributed by Andreas Jaeger <aj@suse.de>, 2001.
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   The GNU C Library is free software; you can redistribute it and/or
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   modify it under the terms of the GNU Lesser General Public
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   License as published by the Free Software Foundation; either
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   version 2.1 of the License, or (at your option) any later version.
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   The GNU C Library is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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   Lesser General Public License for more details.
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   You should have received a copy of the GNU Lesser General Public
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   License along with the GNU C Library; if not, see
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   <http://www.gnu.org/licenses/>.  */
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#include <fenv.h>
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int
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feenableexcept (int excepts)
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{
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  unsigned short int new_exc, old_exc;
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  unsigned int new;
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  excepts &= FE_ALL_EXCEPT;
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  /* Get the current control word of the x87 FPU.  */
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  __asm__ ("fstcw %0" : "=m" (*&new_exc));
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  old_exc = (~new_exc) & FE_ALL_EXCEPT;
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  new_exc &= ~excepts;
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  __asm__ ("fldcw %0" : : "m" (*&new_exc));
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  /* And now the same for the SSE MXCSR register.  */
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  __asm__ ("stmxcsr %0" : "=m" (*&new));
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  /* The SSE exception masks are shifted by 7 bits.  */
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  new &= ~(excepts << 7);
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  __asm__ ("ldmxcsr %0" : : "m" (*&new));
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  return old_exc;
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}