Blame sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S

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/* Round float to int floating-point values without generating
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   an inexact exception, sparc64 vis3 version.
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   Copyright (C) 2013-2018 Free Software Foundation, Inc.
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   This file is part of the GNU C Library.
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   Contributed by David S. Miller <davem@davemloft.net>, 2013.
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   The GNU C Library is free software; you can redistribute it and/or
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   modify it under the terms of the GNU Lesser General Public
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   License as published by the Free Software Foundation; either
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   version 2.1 of the License, or (at your option) any later version.
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   The GNU C Library is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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   Lesser General Public License for more details.
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   You should have received a copy of the GNU Lesser General Public
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   License along with the GNU C Library; if not, see
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   <http://www.gnu.org/licenses/>.  */
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#include <sysdep.h>
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	/* We pop constants into the FPU registers using the incoming
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	   argument stack slots, since this avoid having to use any PIC
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	   references.  We also thus avoid having to allocate a register
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	   window.
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	   VIS instructions are used to facilitate the formation of
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	   easier constants, and the propagation of the sign bit.  */
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#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
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#define ZERO		%f10			/* 0.0 */
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#define SIGN_BIT	%f12			/* -0.0 */
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ENTRY (__nearbyintf_vis3)
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	fcmps	%fcc3, %f1, %f1			/* Check for sNaN */
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	stx	%fsr, [%sp + STACK_BIAS + 144]
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	sethi	%hi(0xf8003e0), %o5
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	sethi	%hi(TWO_TWENTYTHREE), %o2
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	ldx	[%sp + STACK_BIAS + 144], %o4
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	or	%o5, %lo(0xf8003e0), %o5
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	fzeros	ZERO
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	andn	%o4, %o5, %o4
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	fnegs	ZERO, SIGN_BIT
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	movwtos	%o2, %f16
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	stx	%o4, [%sp + STACK_BIAS + 136]
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	ldx	[%sp + STACK_BIAS + 136], %fsr
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	fabss	%f1, %f14
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	fcmps	%fcc3, %f14, %f16
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	fmovsuge %fcc3, ZERO, %f16
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	fands	%f1, SIGN_BIT, SIGN_BIT
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	fors	%f16, SIGN_BIT, %f16
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	fadds	%f1, %f16, %f5
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	fsubs	%f5, %f16, %f0
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	fabss	%f0, %f0
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	fors	%f0, SIGN_BIT, %f0
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	retl
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	 ldx	[%sp + STACK_BIAS + 144], %fsr
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END (__nearbyintf_vis3)