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//C- -*- C++ -*-
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//C- -------------------------------------------------------------------
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//C- DjVuLibre-3.5
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//C- Copyright (c) 2002 Leon Bottou and Yann Le Cun.
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//C- Copyright (c) 2001 AT&T
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//C-
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//C- This software is subject to, and may be distributed under, the
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//C- GNU General Public License, either Version 2 of the license,
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//C- or (at your option) any later version. The license should have
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//C- accompanied the software or you may obtain a copy of the license
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//C- from the Free Software Foundation at http://www.fsf.org .
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//C-
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//C- This program is distributed in the hope that it will be useful,
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//C- but WITHOUT ANY WARRANTY; without even the implied warranty of
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//C- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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//C- GNU General Public License for more details.
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//C-
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//C- DjVuLibre-3.5 is derived from the DjVu(r) Reference Library from
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//C- Lizardtech Software. Lizardtech Software has authorized us to
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//C- replace the original DjVu(r) Reference Library notice by the following
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//C- text (see doc/lizard2002.djvu and doc/lizardtech2007.djvu):
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//C-
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//C- ------------------------------------------------------------------
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//C- | DjVu (r) Reference Library (v. 3.5)
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//C- | Copyright (c) 1999-2001 LizardTech, Inc. All Rights Reserved.
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//C- | The DjVu Reference Library is protected by U.S. Pat. No.
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//C- | 6,058,214 and patents pending.
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//C- |
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//C- | This software is subject to, and may be distributed under, the
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//C- | GNU General Public License, either Version 2 of the license,
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//C- | or (at your option) any later version. The license should have
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//C- | accompanied the software or you may obtain a copy of the license
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//C- | from the Free Software Foundation at http://www.fsf.org .
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//C- |
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//C- | The computer code originally released by LizardTech under this
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//C- | license and unmodified by other parties is deemed "the LIZARDTECH
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//C- | ORIGINAL CODE." Subject to any third party intellectual property
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//C- | claims, LizardTech grants recipient a worldwide, royalty-free,
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//C- | non-exclusive license to make, use, sell, or otherwise dispose of
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//C- | the LIZARDTECH ORIGINAL CODE or of programs derived from the
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//C- | LIZARDTECH ORIGINAL CODE in compliance with the terms of the GNU
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//C- | General Public License. This grant only confers the right to
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//C- | infringe patent claims underlying the LIZARDTECH ORIGINAL CODE to
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//C- | the extent such infringement is reasonably necessary to enable
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//C- | recipient to make, have made, practice, sell, or otherwise dispose
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//C- | of the LIZARDTECH ORIGINAL CODE (or portions thereof) and not to
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//C- | any greater extent that may be necessary to utilize further
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//C- | modifications or combinations.
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//C- |
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//C- | The LIZARDTECH ORIGINAL CODE is provided "AS IS" WITHOUT WARRANTY
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//C- | OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
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//C- | TO ANY WARRANTY OF NON-INFRINGEMENT, OR ANY IMPLIED WARRANTY OF
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//C- | MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
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//C- +------------------------------------------------------------------
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#ifndef _MMX_H_
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#define _MMX_H_
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#if NEED_GNUG_PRAGMAS
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# pragma interface
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#endif
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#include "DjVuGlobal.h"
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#ifdef HAVE_NAMESPACES
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namespace DJVU {
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# ifdef NOT_DEFINED // Just to fool emacs c++ mode
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}
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#endif
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#endif
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/** @name MMX.h
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Files #"MMX.h"# and #"MMX.cpp"# implement basic routines for
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supporting the MMX instructions on x86. Future instruction sets
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for other processors may be supported in this file as well.
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Macro #MMX# is defined if the compiler supports the X86-MMX instructions.
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It does not mean however that the processor supports the instruction set.
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Variable #MMXControl::mmxflag# must be used to decide whether MMX.
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instructions can be executed. MMX instructions are entered in the middle
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of C++ code using the following macros. Examples can be found in
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#"IWTransform.cpp"#.
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\begin{description}
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\item[MMXrr( insn, srcreg, dstreg)]
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Encode a register to register MMX instruction
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(e.g. #paddw# or #punpcklwd#).
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\item[MMXar( insn, addr, dstreg )]
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Encode a memory to register MMX instruction
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(e.g. #moveq# from memory).
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\item[MMXra( insn, srcreg, addr )]
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Encode a register to memory MMX instruction
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(e.g. #moveq# to memory).
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\item[MMXir( insn, imm, dstreg )]
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Encode a immediate to register MMX instruction
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(e.g #psraw#).
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\item[MMXemms]
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Execute the #EMMS# instruction to reset the FPU state.
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\end{description}
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@memo
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Essential support for MMX.
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@author:
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L\'eon Bottou <leonb@research.att.com> -- initial implementation */
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//@{
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/** MMX Control.
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Class #MMXControl# encapsulates a few static functions for
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globally enabling or disabling MMX support. */
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class MMXControl
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{
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public:
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// MMX DETECTION
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/** Detects and enable MMX or similar technologies. This function checks
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whether the CPU supports a vectorial instruction set (such as Intel's
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MMX) and enables them. Returns a boolean indicating whether such an
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instruction set is available. Speedups factors may vary. */
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static int enable_mmx();
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/** Disables MMX or similar technologies. The transforms will then be
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performed using the baseline code. */
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static int disable_mmx();
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/** Contains a value greater than zero if the CPU supports vectorial
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instructions. A negative value means that you must call \Ref{enable_mmx}
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and test the value again. Direct access to this member should only be
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used to transfer the instruction flow to the vectorial branch of the
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code. Never modify the value of this variable. Use #enable_mmx# or
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#disable_mmx# instead. */
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static int mmxflag; // readonly
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};
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//@}
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// ----------------------------------------
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// GCC MMX MACROS
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#ifndef NO_MMX
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#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
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typedef struct{ char c[8]; } MMX_t;
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#define MMXemms \
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__asm__ volatile("emms" : : : "memory" )
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#define MMXrr(op,src,dst) \
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__asm__ volatile( #op " %%" #src ",%%" #dst : : : "memory" )
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#define MMXir(op,imm,dst) \
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__asm__ volatile( #op " %0,%%" #dst : : "i" (imm) : "memory" )
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#define MMXar(op,addr,dst) \
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__asm__ volatile( #op " %0,%%" #dst : : "m" (*(MMX_t*)(addr)) : "memory" )
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#define MMXra(op,src,addr) \
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__asm__ volatile( #op " %%" #src ",%0" : "=m" (*(MMX_t*)(addr)) : : "memory")
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#define MMX 1
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#endif
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// ----------------------------------------
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// MSVC MMX MACROS
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#if defined(_MSC_VER) && defined(_M_IX86)
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// Compiler option /GM is required
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#pragma warning( disable : 4799 )
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#define MMXemms \
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__asm { emms }
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#define MMXrr(op,src,dst) \
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__asm { op dst,src }
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#define MMXir(op,imm,dst) \
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__asm { op dst,imm }
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#define MMXar(op,addr,dst) \
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{ register __int64 var=*(__int64*)(addr); __asm { op dst,var } }
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#define MMXra(op,src,addr) \
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{ register __int64 var; __asm { op [var],src }; *(__int64*)addr = var; }
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// Probably not as efficient as GCC macros
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#define MMX 1
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#endif
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#endif
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// -----------
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#ifdef HAVE_NAMESPACES
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}
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# ifndef NOT_USING_DJVU_NAMESPACE
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using namespace DJVU;
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# endif
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#endif
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#endif
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