|
|
d570a8 |
diff -Nrup a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
|
|
|
d570a8 |
--- a/gas/config/tc-ppc.c 2015-05-07 09:21:42.738374151 -0600
|
|
|
d570a8 |
+++ b/gas/config/tc-ppc.c 2015-05-07 14:58:51.607894208 -0600
|
|
|
d570a8 |
@@ -3143,103 +3143,6 @@ md_assemble (char *str)
|
|
|
d570a8 |
break;
|
|
|
d570a8 |
}
|
|
|
d570a8 |
}
|
|
|
d570a8 |
-
|
|
|
d570a8 |
- /* For the absolute forms of branches, convert the PC
|
|
|
d570a8 |
- relative form back into the absolute. */
|
|
|
d570a8 |
- if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
|
|
|
d570a8 |
- {
|
|
|
d570a8 |
- switch (reloc)
|
|
|
d570a8 |
- {
|
|
|
d570a8 |
- case BFD_RELOC_PPC_B26:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC_BA26;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_B16:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC_BA16;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_B16_BRTAKEN:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_B16_BRNTAKEN:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- default:
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- }
|
|
|
d570a8 |
- }
|
|
|
d570a8 |
-
|
|
|
d570a8 |
- switch (reloc)
|
|
|
d570a8 |
- {
|
|
|
d570a8 |
- case BFD_RELOC_PPC_TOC16:
|
|
|
d570a8 |
- toc_reloc_types |= has_small_toc_reloc;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC64_TOC16_LO:
|
|
|
d570a8 |
- case BFD_RELOC_PPC64_TOC16_HI:
|
|
|
d570a8 |
- case BFD_RELOC_PPC64_TOC16_HA:
|
|
|
d570a8 |
- toc_reloc_types |= has_large_toc_reloc;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- default:
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- }
|
|
|
d570a8 |
-
|
|
|
d570a8 |
- if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
|
|
|
d570a8 |
- {
|
|
|
d570a8 |
- switch (reloc)
|
|
|
d570a8 |
- {
|
|
|
d570a8 |
- case BFD_RELOC_16:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_ADDR16_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_LO16:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_16_GOTOFF:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_GOT16_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_LO16_GOTOFF:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_LO16_PLTOFF:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_16_BASEREL:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_SECTOFF_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_LO16_BASEREL:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_TOC16:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_TOC16_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC64_TOC16_LO:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC64_PLTGOT16:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC64_PLTGOT16_LO:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_DTPREL16:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_DTPREL16_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_DTPREL16_LO:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_TPREL16:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_TPREL16_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_TPREL16_LO:
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- case BFD_RELOC_PPC_GOT_DTPREL16:
|
|
|
d570a8 |
- case BFD_RELOC_PPC_GOT_DTPREL16_LO:
|
|
|
d570a8 |
- case BFD_RELOC_PPC_GOT_TPREL16:
|
|
|
d570a8 |
- case BFD_RELOC_PPC_GOT_TPREL16_LO:
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- default:
|
|
|
d570a8 |
- as_bad (_("unsupported relocation for DS offset field"));
|
|
|
d570a8 |
- break;
|
|
|
d570a8 |
- }
|
|
|
d570a8 |
- }
|
|
|
d570a8 |
}
|
|
|
d570a8 |
#endif /* OBJ_ELF */
|
|
|
d570a8 |
|
|
|
d570a8 |
@@ -3248,11 +3151,13 @@ md_assemble (char *str)
|
|
|
d570a8 |
/* Determine a BFD reloc value based on the operand information.
|
|
|
d570a8 |
We are only prepared to turn a few of the operands into
|
|
|
d570a8 |
relocs. */
|
|
|
d570a8 |
- else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
|
|
|
d570a8 |
+ else if ((operand->flags & (PPC_OPERAND_RELATIVE
|
|
|
d570a8 |
+ | PPC_OPERAND_ABSOLUTE)) != 0
|
|
|
d570a8 |
&& operand->bitm == 0x3fffffc
|
|
|
d570a8 |
&& operand->shift == 0)
|
|
|
d570a8 |
reloc = BFD_RELOC_PPC_B26;
|
|
|
d570a8 |
- else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
|
|
|
d570a8 |
+ else if ((operand->flags & (PPC_OPERAND_RELATIVE
|
|
|
d570a8 |
+ | PPC_OPERAND_ABSOLUTE)) != 0
|
|
|
d570a8 |
&& operand->bitm == 0xfffc
|
|
|
d570a8 |
&& operand->shift == 0)
|
|
|
d570a8 |
reloc = BFD_RELOC_PPC_B16;
|
|
|
d570a8 |
@@ -3268,40 +3173,126 @@ md_assemble (char *str)
|
|
|
d570a8 |
&& operand->bitm == 0x1fffffe
|
|
|
d570a8 |
&& operand->shift == 0)
|
|
|
d570a8 |
reloc = BFD_RELOC_PPC_VLE_REL24;
|
|
|
d570a8 |
- else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
|
|
|
d570a8 |
- && operand->bitm == 0x3fffffc
|
|
|
d570a8 |
- && operand->shift == 0)
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC_BA26;
|
|
|
d570a8 |
- else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
|
|
|
d570a8 |
- && operand->bitm == 0xfffc
|
|
|
d570a8 |
- && operand->shift == 0)
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC_BA16;
|
|
|
d570a8 |
-#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
|
|
|
d570a8 |
- else if ((operand->flags & PPC_OPERAND_PARENS) != 0
|
|
|
d570a8 |
+ else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
|
|
|
d570a8 |
&& (operand->bitm & 0xfff0) == 0xfff0
|
|
|
d570a8 |
&& operand->shift == 0)
|
|
|
d570a8 |
{
|
|
|
d570a8 |
+ reloc = BFD_RELOC_16;
|
|
|
d570a8 |
+#if defined OBJ_XCOFF || defined OBJ_ELF
|
|
|
d570a8 |
/* Note: the symbol may be not yet defined. */
|
|
|
d570a8 |
- if (ppc_is_toc_sym (ex.X_add_symbol))
|
|
|
d570a8 |
+ if ((operand->flags & PPC_OPERAND_PARENS) != 0
|
|
|
d570a8 |
+ && ppc_is_toc_sym (ex.X_add_symbol))
|
|
|
d570a8 |
{
|
|
|
d570a8 |
reloc = BFD_RELOC_PPC_TOC16;
|
|
|
d570a8 |
#ifdef OBJ_ELF
|
|
|
d570a8 |
- if (ppc_obj64
|
|
|
d570a8 |
- && (operand->flags & PPC_OPERAND_DS) != 0)
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_TOC16_DS;
|
|
|
d570a8 |
+ as_warn (_("assuming %s on symbol"),
|
|
|
d570a8 |
+ ppc_obj64 ? "@toc" : "@xgot");
|
|
|
d570a8 |
#endif
|
|
|
d570a8 |
}
|
|
|
d570a8 |
- else
|
|
|
d570a8 |
+#endif
|
|
|
d570a8 |
+ }
|
|
|
d570a8 |
+
|
|
|
d570a8 |
+ /* For the absolute forms of branches, convert the PC
|
|
|
d570a8 |
+ relative form back into the absolute. */
|
|
|
d570a8 |
+ if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
|
|
|
d570a8 |
+ {
|
|
|
d570a8 |
+ switch (reloc)
|
|
|
d570a8 |
{
|
|
|
d570a8 |
- reloc = BFD_RELOC_16;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_B26:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC_BA26;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_B16:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC_BA16;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
#ifdef OBJ_ELF
|
|
|
d570a8 |
- if (ppc_obj64
|
|
|
d570a8 |
- && (operand->flags & PPC_OPERAND_DS) != 0)
|
|
|
d570a8 |
- reloc = BFD_RELOC_PPC64_ADDR16_DS;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_B16_BRTAKEN:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_B16_BRNTAKEN:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
#endif
|
|
|
d570a8 |
+ default:
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ }
|
|
|
d570a8 |
+ }
|
|
|
d570a8 |
+
|
|
|
d570a8 |
+#ifdef OBJ_ELF
|
|
|
d570a8 |
+ switch (reloc)
|
|
|
d570a8 |
+ {
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_TOC16:
|
|
|
d570a8 |
+ toc_reloc_types |= has_small_toc_reloc;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC64_TOC16_LO:
|
|
|
d570a8 |
+ case BFD_RELOC_PPC64_TOC16_HI:
|
|
|
d570a8 |
+ case BFD_RELOC_PPC64_TOC16_HA:
|
|
|
d570a8 |
+ toc_reloc_types |= has_large_toc_reloc;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ default:
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ }
|
|
|
d570a8 |
+
|
|
|
d570a8 |
+ if (ppc_obj64
|
|
|
d570a8 |
+ && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
|
|
|
d570a8 |
+ {
|
|
|
d570a8 |
+ switch (reloc)
|
|
|
d570a8 |
+ {
|
|
|
d570a8 |
+ case BFD_RELOC_16:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_ADDR16_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_LO16:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_16_GOTOFF:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_GOT16_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_LO16_GOTOFF:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_LO16_PLTOFF:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_16_BASEREL:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_SECTOFF_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_LO16_BASEREL:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_TOC16:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_TOC16_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC64_TOC16_LO:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC64_PLTGOT16:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC64_PLTGOT16_LO:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_DTPREL16:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_DTPREL16_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_DTPREL16_LO:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_TPREL16:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_TPREL16_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_TPREL16_LO:
|
|
|
d570a8 |
+ reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_GOT_DTPREL16:
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_GOT_DTPREL16_LO:
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_GOT_TPREL16:
|
|
|
d570a8 |
+ case BFD_RELOC_PPC_GOT_TPREL16_LO:
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
+ default:
|
|
|
d570a8 |
+ as_bad (_("unsupported relocation for DS offset field"));
|
|
|
d570a8 |
+ break;
|
|
|
d570a8 |
}
|
|
|
d570a8 |
}
|
|
|
d570a8 |
-#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
|
|
|
d570a8 |
+#endif
|
|
|
d570a8 |
|
|
|
d570a8 |
/* We need to generate a fixup for this expression. */
|
|
|
d570a8 |
if (fc >= MAX_INSN_FIXUPS)
|
|
|
d570a8 |
diff -Nrup a/ld/testsuite/ld-powerpc/elfv2exe.d b/ld/testsuite/ld-powerpc/elfv2exe.d
|
|
|
d570a8 |
--- a/ld/testsuite/ld-powerpc/elfv2exe.d 2015-05-07 09:21:42.727374395 -0600
|
|
|
d570a8 |
+++ b/ld/testsuite/ld-powerpc/elfv2exe.d 2015-05-07 09:26:49.048581753 -0600
|
|
|
d570a8 |
@@ -21,7 +21,7 @@ Disassembly of section \.text:
|
|
|
d570a8 |
|
|
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d570a8 |
0+100000e0 <_start>:
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d570a8 |
.*: (02 10 40 3c|3c 40 10 02) lis r2,4098
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d570a8 |
-.*: (40 81 42 38|38 42 81 40) addi r2,r2,-32448
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d570a8 |
+.*: (38 81 42 38|38 42 81 38) addi r2,r2,-32456
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d570a8 |
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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d570a8 |
.*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\)
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d570a8 |
.*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\)
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d570a8 |
diff -Nrup a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d
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d570a8 |
--- a/ld/testsuite/ld-powerpc/elfv2so.d 2015-05-07 09:21:42.688375260 -0600
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d570a8 |
+++ b/ld/testsuite/ld-powerpc/elfv2so.d 2015-05-07 09:26:49.048581753 -0600
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d570a8 |
@@ -7,33 +7,33 @@
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d570a8 |
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d570a8 |
Disassembly of section \.text:
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d570a8 |
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d570a8 |
-0+300 <.*\.plt_call\.f4>:
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d570a8 |
+0+320 <.*\.plt_call\.f4>:
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d570a8 |
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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d570a8 |
.*: (38 80 82 e9|e9 82 80 38) ld r12,-32712\(r2\)
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d570a8 |
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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d570a8 |
.*: (20 04 80 4e|4e 80 04 20) bctr
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d570a8 |
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d570a8 |
-0+310 <.*\.plt_call\.f3>:
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d570a8 |
+0+330 <.*\.plt_call\.f3>:
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d570a8 |
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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d570a8 |
.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
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d570a8 |
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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d570a8 |
.*: (20 04 80 4e|4e 80 04 20) bctr
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d570a8 |
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d570a8 |
-0+320 <.*\.plt_call\.f2>:
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d570a8 |
+0+340 <.*\.plt_call\.f2>:
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d570a8 |
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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d570a8 |
.*: (30 80 82 e9|e9 82 80 30) ld r12,-32720\(r2\)
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d570a8 |
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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d570a8 |
.*: (20 04 80 4e|4e 80 04 20) bctr
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d570a8 |
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d570a8 |
-0+330 <.*\.plt_call\.f1>:
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d570a8 |
+0+350 <.*\.plt_call\.f1>:
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d570a8 |
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
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d570a8 |
.*: (40 80 82 e9|e9 82 80 40) ld r12,-32704\(r2\)
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d570a8 |
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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d570a8 |
.*: (20 04 80 4e|4e 80 04 20) bctr
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d570a8 |
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d570a8 |
-0+340 <f1>:
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d570a8 |
+0+360 <f1>:
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d570a8 |
.*: (02 00 4c 3c|3c 4c 00 02) addis r2,r12,2
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d570a8 |
-.*: (e0 81 42 38|38 42 81 e0) addi r2,r2,-32288
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d570a8 |
+.*: (d8 81 42 38|38 42 81 d8) addi r2,r2,-32296
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d570a8 |
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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d570a8 |
.*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\)
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d570a8 |
.*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\)
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d570a8 |
@@ -50,10 +50,10 @@ Disassembly of section \.text:
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d570a8 |
.*: (20 00 21 38|38 21 00 20) addi r1,r1,32
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d570a8 |
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
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d570a8 |
.*: (20 00 80 4e|4e 80 00 20) blr
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d570a8 |
-.*: (a0 01 01 00|00 00 00 00) .*
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d570a8 |
-.*: (00 00 00 00|00 01 01 a0) .*
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d570a8 |
+.*: (98 01 01 00|00 00 00 00) .*
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d570a8 |
+.*: (00 00 00 00|00 01 01 98) .*
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d570a8 |
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d570a8 |
-0+390 <__glink_PLTresolve>:
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d570a8 |
+0+3b0 <__glink_PLTresolve>:
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d570a8 |
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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d570a8 |
.*: (05 00 9f 42|42 9f 00 05) bcl .*
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d570a8 |
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
|